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vhdl0716
- ISE7.1,采用VIRTEX-II芯片。实现adc数据采样,平均,通道选择,采样时钟选择,数据格式调整,内含fifo,uart等模块。
KCPSM3
- This the 8th release of PicoBlaze for Spartan-3, Spartan-3E Virtex-II, Virtex-IIPro and Virtex-4 devices by Picoblaze
xapp134_vhdl
- The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with timing constraints at 115 MHZ.
ml405_schematics
- Xilinx Virtex 4 ML405开发平台的原理图 设置引脚文件的时候可以用到
rs_enc
- 使用IP Core实现了3GPP/UMTS所规定的Turbo码编码,可以在Virtex全系列和Spartan-3E等芯片上使用,最多支持16路信号,能提供3GPP所要求的1/3码率输出和可选的1/5码率输出
virtex4_datasheet
- virtex-4 datasheet
v4
- Xilinx公司 Virtex4 FPGA官方评估板的电路原理图和相应的PCB文件。是Virtex FPGA硬件电路设计的典范参考设计。其中,PCB文件是PADS格式。
ISE_chinese
- Xilinx ISE中文简明教程、Xilinx术语中文.pdf、Virtex 系列 FPGA 的配置和回读、FPGA设计检查清单.pdf、设计注意.pdf、逻辑设计注意列表.pdf
xapp866
- 用于 Texas Instruments 模数转换器的 Virtex-4 和 Virtex-5 接口-Texas Instruments ADC for Virtex-4 and Virtex-5 Interface
mp3
- 关于pm3的源代码,AC97 驱动和MP3 文件的播放 东芯 IV SEP3203F50 处理器中MP3 应用的演示程序-Pm3 source code on, AC97 drive and play MP3 files East IV SEP3203F50 processor core MP3 demo applications
verilog_sdram_controller_testbench
- SDRAM 控制器 ,Verilog版本的,带有完整的SDRAM 仿真模型,testbench等,能够实际使用,并且利于学习-The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with backannotated simulation at 125MHz
ac97
- 基于CS5536的AC97编程的一个播放WAV文件的演示程序,对于理解AC97原理,学习AC97编程应该很有帮助,相应文章说明请参考:http://hengch.blog.163.com/blog/static/107800672008316480684/-CS5536 Programming based on the AC97 a WAV file player demo program, the principle for understanding the AC97, AC97 study
xapp957
- The system provides an example of how to integrate the Virtex-5 Embedded Tri-Mode Ethernet MAC and the Virtex-5 Embedded Tri-Mode Ethernet MAC wrapper using a hardware design to target the development board and a PC-based Graphical User Interface (GU
ml50x_schematics
- xilinx公司的virtex-5开发板原理图 需要的可以下载看一下 希望对你有帮助-xilinx company virtex-5 development board schematics can download look you want to help
XAPP217
- Gold Code Generators in Virtex Devices
DDRSDRAMControllerverilogcode
- 这个设计是使用Virtex-4实现DDR的控制器的,设计分为三个主要模块:Front-End FIFOs,DDR SDRAM Controller和Datapath Module。其中主要是DDR SDRAM Controller,当然还有测试模块。-This design is the use of Virtex-4 implementation of the DDR controller, the design is divided into three main modules: Fron
audiofiles
- audio file on virtex
pctosram
- interface pc to virtex
sramfiles
- interface on virtex test ram
videoinfiles
- source application for virtex