搜索资源列表
digital_demo
- 数码管扫描驱动,用Verilog编写,采用模块化思想-digital tube scan driver writen by verilog,using the thought of module
shumaguan
- 基于51单片机的数码管扫描程序,也是想学习51的基础-Based on 51 single-chip digital tube scanner, but also want to learn the basics 51
shiyan_5_1
- 这是一个VHDL写的数码管扫描程序,本人在实验平台上验证无误,原版。-This is a write VHDL digital scanner, I verify and correct the experimental platform, the original.
Experiment_3
- dspic16f877代码程序,是数码管扫描显示的相关编程代码,可以让新手学习-coding of dspic16F877 with seg scanning display
plus1
- 3位二进制运算器及其数码管扫描显示电路3 binary arithmetic and digital scanning display circuit-3 binary arithmetic and digital scanning display circuit
counter_pro
- 毕业设计 基于51单片机 篮球计分板 数码管扫描显示-Graduation design is based on 51 microcontroller Basketball Scoreboard
vhdlll
- 八位数码管扫描显示程序,要求显示12345678 间隔四秒显示56789ABC 间隔四秒显示3456789A 再隔4秒显示 -LIBRARY IEEE USE IEEE.STD_LOGIC_1164.ALL USE IEEE.STD_LOGIC_UNSIGNED.ALL ENTITY chenyongqiang IS PORT ( CLK : IN STD_LOGIC SG : OUT STD_LOGIC_VECTOR(6 DOWNTO 0) 段控制信号输出
test
- 基于FPGA的数字秒表(数码管扫描)程序。 平台:quartusII 15.0-FPGA-based digital stopwatch (digital scan) program. Platform: quartusII 15.0
calculator-for-51
- 基于AT89C51RC单片机的科学计算器,采用8位数码管扫描显示,矩阵键盘采用反转法扫描,效率更高,速度更快。-Based on the AT89C51RC microcontroller scientific calculator, the use of 8 digital tube scanning display, matrix keyboard using reverse scanning method, the efficiency is higher, faster.
dianzhen
- 需要实现点阵按列依次并且循环显示的效果,可以分析视觉上可以观察到列的变化,则列的扫描频率必定要远远小于行扫描的频率。在程序中,设置行扫描的频率等于前次实验中数码管扫描的频率,设置列扫描的频率为5HZ,即每0.2s显示亮的一列向前推进一列。在程序中,使用16进制计数作为74HC154的输入:分出5hz的频率,并用其计数,将计数值作为74HC154,则其译码产生的输出变化也为5hz,并且实现每列一次选通。由于每行对应的数码管共阳极。直接赋高电平。则可以实现所需要的功能。行扫面则是要实现先依行点亮,
main
- 数码管扫描显示程序,这个程序本人亲写,有不当的地方,欢迎大家来指教-Scanning digital tube display program, the program I write, there is improper, welcome everybody to give advice or comments
display_sm
- 数码管扫描verilog源代码 display code verilog-display code
lab3
- 数码管扫描电路,通过扫描数码管实现多个数码管同时显像功能-Digital scanning circuit, through digital scanning of multiple simultaneous digital imaging capabilities
Digital-tube-display
- 一种用VHDL写的数码管扫描电路,简单明了,仅供参考-One kind with VHDL written digital scanning circuit, plain and simple, for reference only
2014011494
- FPGA嵌入式开发全加法器程序。二进制运算器及数码管扫描电路-FPGA embedded development full adder program. Binary calculator and digital tube scanning circuit
saomiao
- 89c51巴顿数码管循环显示2017可能有点不兼容(Digital tube cycle display 2017)
51单片机按键扫描程序
- 51单片机加外设,利用实验板提供的键盘扫描电路和显示电路,做一个扫描键盘和数码显示实验,把按键输入的键码在六位数码管上显示出来。(51 SCM plus peripherals, the use of the experimental board keyboard scanning circuit and display circuit, do a scan keyboard and digital display experiment, the key input code in six di
shumaguan
- 用于数字码与扫描显示数码的解算 可修改运算过程来适配所需要的输入数据格式(It can be used to modify the operation process of digital code and scanning digital display to adapt the input data format)
3
- 设计一个键盘接口电路。要求: (1)用200Hz时钟频率有效地去除按键的抖动; (2)用20Hz时钟频率对键盘进行扫描识别,并用数码管将按键的编号显示出来;(Design a keyboard interface circuit. Requirements: (1) use the 200Hz clock frequency to effectively remove the shaking of the keys; (2) scan the keyboard with 20Hz clo
saomiaojianpan
- 用于扫描矩阵键盘,并将扫描到的键盘值用数码管显示(Used to scan the matrix keyboard and display the scanned keyboard value with a digital tube)