资源列表
winio
- WinIo v2.0 源码，用于并口编程-WinIo v2.0 source code for parallel programming
sushu1
- TD-SCDMA的长期演进TD-LTE。为减轻TD-LTE综测仪开发中调试的复杂性，通过研究分析TD-LTE系统原语，提出了一种基于DSP TMS320C6455和FPGA 5vsx95tff1136(Xilinx)芯片的原语追踪平台。-Long-term evolution of TD-SCDMA, TD-LTE. TD-LTE system primitives through research and analysis in order to reduce the complexity o
principle-of-microcomputer
- princple of microcomputer
main
- ball follower robot , parallel port comm.matlab
WinIOTest
- 一个自己编写的并口测试程序，可以发送数据-a test program for parallel ports
Ket_qua
- ket qua mô phỏ ng anten sieu cao tan-ket qua mô phỏ ng anten sieu cao tan
fifo2
- 一种简单的FIFO的verilog代码，有利于理解FIFO的工作原理-code of fifo in verilog
485duoji
- 485通信，中断里设置了4个标志，用于主函数里的多种数据的识别，用于IAR软件-485 communication, interrupt where four flag is set for the identification of the main function in a variety of data for the IAR software
12864
- 128*64點陣、控制IC為ST7567的LCD模組測試程式-Test program for 128* 64 dot matrix LCD module （control IC is ST7567）
AMD_cpu_Te22146711142011
- this cominication parallel port
CummingsSNUG2002SJ_FIFO1_rev1_1
- FIFO设计,采用verilog语言编写，相当不错，验证可行-Altera FPGA CPLD design (Basics) CD-ROM1
AD9850
- 关于AD9850的波形新号发生器的源程序-AD9850 waveform generator source