资源列表
counter
- 用verilog语言实现计数器设计，其中包括同步加法计数器、同步减法计数器、异步加法、异步减法-Design verilog language implement counter
fsm
- 用verilog实现移位寄存器的设计，包括详细的代码-With verilog realize the shift register design, including a detailed code
fsm1
- 用verilog实现有限状态机，是摩尔型的，有详细代码-Finite state machines using verilog to achieve, is the molar type, a detailed Code
frequency
- 用verilog实现频率计设计，包括详细源代码-Using verilog to achieve frequency meter design, including detailed source code
string
- 用verilog语言实现串口收发器设计，有详细代码-Serial Transceiver Design verilog language, a detailed Code
ug480_7Series_XADC
- VHDL实现fpga的信号ADC采集，适合zybo，zedboard等板子-VHDL realization fpga signal ADC acquisition for zybo, zedboard and other board
vote
- thinkphp投票php is a voting system used thinkphp framework, try to vote and postnatal management-vote php is a voting system used thinkphp framework, try to vote and postnatal management
chapter8
- 量子遗传算法的代码，是量子计算和遗传算法的结合后的成果。-Quantum genetic
copy
- 中南大学汇编实验代码源码 copy文件一道难关要二十字也是醉了 -copy a file
ostu
- 讲述图像分割的方法，会给初学者很大的帮助-Image segmentation method described, will be very helpful for beginners
tsp
- 练习tsp问题，根据python环境编写程序，求解旅行商问题-practice TSP
Interface
- keypad with pic18f4550