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文件名称:Chapter-9

  • 所属分类：
    source in ebook
  • 标签属性：
    [ASM] [源码]
  • 上传时间：
    2013-09-29
  • 文件大小：
    3.77mb
  • 已下载：
    0次
  • 提 供 者：
    shixi******
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

9.1　异步FIFO设计实例　

9.2　DDR SDRAM Controller设计实例-9.1 Asynchronous FIFO design example 9.2 DDR SDRAM Controller Design Example
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Chapter-9/9.1/chart/Thumbs.db
Chapter-9/9.1/chart/图9-10.bmp
Chapter-9/9.1/chart/图9-4.bmp
Chapter-9/9.1/chart/图9-5.bmp
Chapter-9/9.1/chart/图9-6.bmp
Chapter-9/9.1/chart/图9-9.bmp
Chapter-9/9.1/fifo.cr.mti
Chapter-9/9.1/fifo.mpf
Chapter-9/9.1/generic_fifo_sc.v
Chapter-9/9.1/note.txt
Chapter-9/9.1/test_bench_top.v
Chapter-9/9.1/timescale.v
Chapter-9/9.1/transcript
Chapter-9/9.1/vsim.wlf
Chapter-9/9.1/wave/generic_dpram.bmp
Chapter-9/9.1/wave/generic_fifo_sc.bmp
Chapter-9/9.1/wave/test_bench_top.bmp
Chapter-9/9.1/wave/Thumbs.db
Chapter-9/9.1/work/generic_dpram/verilog.asm
Chapter-9/9.1/work/generic_dpram/_primary.dat
Chapter-9/9.1/work/generic_dpram/_primary.vhd
Chapter-9/9.1/work/generic_fifo_dc/verilog.asm
Chapter-9/9.1/work/generic_fifo_dc/_primary.dat
Chapter-9/9.1/work/generic_fifo_dc/_primary.vhd
Chapter-9/9.1/work/generic_fifo_dc_gray/verilog.asm
Chapter-9/9.1/work/generic_fifo_dc_gray/_primary.dat
Chapter-9/9.1/work/generic_fifo_dc_gray/_primary.vhd
Chapter-9/9.1/work/generic_fifo_lfsr/verilog.asm
Chapter-9/9.1/work/generic_fifo_lfsr/_primary.dat
Chapter-9/9.1/work/generic_fifo_lfsr/_primary.vhd
Chapter-9/9.1/work/generic_fifo_sc/verilog.asm
Chapter-9/9.1/work/generic_fifo_sc/_primary.dat
Chapter-9/9.1/work/generic_fifo_sc/_primary.vhd
Chapter-9/9.1/work/generic_fifo_sc_a/verilog.asm
Chapter-9/9.1/work/generic_fifo_sc_a/_primary.dat
Chapter-9/9.1/work/generic_fifo_sc_a/_primary.vhd
Chapter-9/9.1/work/lfsr/verilog.asm
Chapter-9/9.1/work/lfsr/_primary.dat
Chapter-9/9.1/work/lfsr/_primary.vhd
Chapter-9/9.1/work/test_bench_top/verilog.asm
Chapter-9/9.1/work/test_bench_top/_primary.dat
Chapter-9/9.1/work/test_bench_top/_primary.vhd
Chapter-9/9.1/work/_info
Chapter-9/9.2/altclklock.v
Chapter-9/9.2/chart/Thumbs.db
Chapter-9/9.2/chart/图9-16.bmp
Chapter-9/9.2/chart/图9-17.bmp
Chapter-9/9.2/chart/图9-19.bmp
Chapter-9/9.2/chart/图9-20.bmp
Chapter-9/9.2/chart/图9-22.bmp
Chapter-9/9.2/chart/图9-23.bmp
Chapter-9/9.2/chart/图9-26.bmp
Chapter-9/9.2/chart/图9-27.bmp
Chapter-9/9.2/ddr.cr.mti
Chapter-9/9.2/ddr.mpf
Chapter-9/9.2/ddr_Command.v
Chapter-9/9.2/ddr_control_interface.v
Chapter-9/9.2/ddr_data_path.v
Chapter-9/9.2/ddr_sdram.v
Chapter-9/9.2/ddr_sdram_tb.v
Chapter-9/9.2/note.txt
Chapter-9/9.2/Params.v
Chapter-9/9.2/pll1.v
Chapter-9/9.2/transcript
Chapter-9/9.2/vsim.wlf
Chapter-9/9.2/wave/ddr_command.bmp
Chapter-9/9.2/wave/ddr_control_interface.bmp
Chapter-9/9.2/wave/ddr_data_path.bmp
Chapter-9/9.2/wave/ddr_sdram.bmp
Chapter-9/9.2/wave/ddr_sdram_tb.bmp
Chapter-9/9.2/wave/Thumbs.db
Chapter-9/9.2/work/altclklock/verilog.asm
Chapter-9/9.2/work/altclklock/_primary.dat
Chapter-9/9.2/work/altclklock/_primary.vhd
Chapter-9/9.2/work/ddr_command/verilog.asm
Chapter-9/9.2/work/ddr_command/_primary.dat
Chapter-9/9.2/work/ddr_command/_primary.vhd
Chapter-9/9.2/work/ddr_control_interface/verilog.asm
Chapter-9/9.2/work/ddr_control_interface/_primary.dat
Chapter-9/9.2/work/ddr_control_interface/_primary.vhd
Chapter-9/9.2/work/ddr_data_path/verilog.asm
Chapter-9/9.2/work/ddr_data_path/_primary.dat
Chapter-9/9.2/work/ddr_data_path/_primary.vhd
Chapter-9/9.2/work/ddr_sdram/verilog.asm
Chapter-9/9.2/work/ddr_sdram/_primary.dat
Chapter-9/9.2/work/ddr_sdram/_primary.vhd
Chapter-9/9.2/work/ddr_sdram_tb/verilog.asm
Chapter-9/9.2/work/ddr_sdram_tb/_primary.dat
Chapter-9/9.2/work/ddr_sdram_tb/_primary.vhd
Chapter-9/9.2/work/mt46v4m16/verilog.asm
Chapter-9/9.2/work/mt46v4m16/_primary.dat
Chapter-9/9.2/work/mt46v4m16/_primary.vhd
Chapter-9/9.2/work/pll1/transcript
Chapter-9/9.2/work/pll1/verilog.asm
Chapter-9/9.2/work/pll1/_primary.dat
Chapter-9/9.2/work/pll1/_primary.vhd
Chapter-9/9.2/work/_info
Chapter-9/9.1/work/generic_dpram
Chapter-9/9.1/work/generic_fifo_dc
Chapter-9/9.1/work/generic_fifo_dc_gray
Chapter-9/9.1/work/generic_fifo_lfsr
Chapter-9/9.1/work/generic_fifo_sc
Chapter-9/9.1/work/generic_fifo_sc_a
Chapter-9/9.1/work/lfsr
Chapter-9/9.1/work/test_bench_top
Chapter-9/9.2/work/altclklock
Chapter-9/9.2/work/ddr_command
Chapter-9/9.2/work/ddr_control_interface
Chapter-9/9.2/work/ddr_data_path
Chapter-9/9.2/work/ddr_sdram
Chapter-9/9.2/work/ddr_sdram_tb
Chapter-9/9.2/work/mt46v4m16
Chapter-9/9.2/work/pll1
Chapter-9/9.1/chart
Chapter-9/9.1/wave
Chapter-9/9.1/work
Chapter-9/9.2/chart
Chapter-9/9.2/wave
Chapter-9/9.2/work
Chapter-9/9.1
Chapter-9/9.2
Chapter-9

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