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文件名称:blif2verilog-v1.2
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- 上传时间：2013-11-30
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将BLIF（Berkeley Logic Interchange Format）格式的电路转换为verilog代码，使用perl编写，需要perl环境才能使用。
内含BLIF格式的官方说明。-Translate BLIF（Berkeley Logic Interchange Format）circuit to verilog descr iption, the translator need perl environment to run. Please check you have related tools.
Also include a offical document about BLIF explanation.
内含BLIF格式的官方说明。-Translate BLIF（Berkeley Logic Interchange Format）circuit to verilog descr iption, the translator need perl environment to run. Please check you have related tools.
Also include a offical document about BLIF explanation.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
blif.pdf
blif2verilog.pl
COPYRIGHT.txt
README.txt
blif2verilog.pl
COPYRIGHT.txt
README.txt
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