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文件名称:my_spi_done

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  • 上传时间:
    2016-07-20
  • 文件大小:
    15.8mb
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Xilinx EDK开发 通过FPGA实现SPI通信-DK Xilinx development through SPI to achieve FPGA communication
(系统自动生成,下载前可以参看下载内容)

下载文件列表

my_spi/bitinit.log
my_spi/blkdiagram/svg10.dtd
my_spi/blkdiagram/system.css
my_spi/blkdiagram/system.html
my_spi/blkdiagram/system.svg
my_spi/clock_generator_0.log
my_spi/data/system.ucf
my_spi/drivers/tft_v1_00_a/data/tft_v2_1_0.mdd
my_spi/drivers/tft_v1_00_a/data/tft_v2_1_0.tcl
my_spi/drivers/tft_v1_00_a/doc/html/api/annotated.html
my_spi/drivers/tft_v1_00_a/doc/html/api/files.html
my_spi/drivers/tft_v1_00_a/doc/html/api/functions.html
my_spi/drivers/tft_v1_00_a/doc/html/api/functions_vars.html
my_spi/drivers/tft_v1_00_a/doc/html/api/globals.html
my_spi/drivers/tft_v1_00_a/doc/html/api/globals_defs.html
my_spi/drivers/tft_v1_00_a/doc/html/api/globals_func.html
my_spi/drivers/tft_v1_00_a/doc/html/api/globals_vars.html
my_spi/drivers/tft_v1_00_a/doc/html/api/index.html
my_spi/drivers/tft_v1_00_a/doc/html/api/struct_x_tft.html
my_spi/drivers/tft_v1_00_a/doc/html/api/struct_x_tft___config.html
my_spi/drivers/tft_v1_00_a/doc/html/api/xtft_8c.html
my_spi/drivers/tft_v1_00_a/doc/html/api/xtft_8h.html
my_spi/drivers/tft_v1_00_a/doc/html/api/xtft__charcode_8h.html
my_spi/drivers/tft_v1_00_a/doc/html/api/xtft__g_8c.html
my_spi/drivers/tft_v1_00_a/doc/html/api/xtft__hw_8h.html
my_spi/drivers/tft_v1_00_a/doc/html/api/xtft__sinit_8c.html
my_spi/drivers/tft_v1_00_a/examples/xtft_example.c
my_spi/drivers/tft_v1_00_a/src/Makefile
my_spi/drivers/tft_v1_00_a/src/uart.c
my_spi/drivers/tft_v1_00_a/src/uart.h
my_spi/drivers/tft_v1_00_a/src/xtft.c
my_spi/drivers/tft_v1_00_a/src/xtft.h
my_spi/drivers/tft_v1_00_a/src/xtft_charcode.h
my_spi/drivers/tft_v1_00_a/src/xtft_g.c
my_spi/drivers/tft_v1_00_a/src/xtft_hw.h
my_spi/drivers/tft_v1_00_a/src/xtft_sinit.c
my_spi/drivers/uart.c
my_spi/drivers/uart.h
my_spi/etc/bitgen.ut
my_spi/etc/download.cmd
my_spi/etc/fast_runtime.opt
my_spi/hdl/clock_generator_0_wrapper.vhd
my_spi/hdl/ddr_sdram_wrapper.v
my_spi/hdl/dsocm_bram_wrapper.vhd
my_spi/hdl/elaborate/dsocm_bram_elaborate_v1_00_a/hdl/vhdl/dsocm_bram_elaborate.vhd
my_spi/hdl/elaborate/isocm_bram_elaborate_v1_00_a/hdl/vhdl/isocm_bram_elaborate.vhd
my_spi/hdl/elaborate/plb_bram_if_cntlr_1_bram_elaborate_v1_00_a/hdl/vhdl/plb_bram_if_cntlr_1_bram_elaborate.vhd
my_spi/hdl/isocm_bram_wrapper.vhd
my_spi/hdl/jtagppc_cntlr_0_wrapper.vhd
my_spi/hdl/plb0_wrapper.vhd
my_spi/hdl/plb_bram_if_cntlr_1_bram_wrapper.vhd
my_spi/hdl/ppc405_0_docm_cntlr_wrapper.vhd
my_spi/hdl/ppc405_0_docm_wrapper.vhd
my_spi/hdl/ppc405_0_dplb1_wrapper.vhd
my_spi/hdl/ppc405_0_iocm_cntlr_wrapper.vhd
my_spi/hdl/ppc405_0_iocm_wrapper.vhd
my_spi/hdl/ppc405_0_iplb1_wrapper.vhd
my_spi/hdl/ppc405_0_wrapper.vhd
my_spi/hdl/proc_sys_reset_0_wrapper.vhd
my_spi/hdl/rs232_wrapper.vhd
my_spi/hdl/system.vhd
my_spi/hdl/system_stub.vhd
my_spi/hdl/xps_bram_if_cntlr_1_wrapper.vhd
my_spi/hdl/xps_gpio_0_wrapper.vhd
my_spi/hdl/xps_spi_0_wrapper.vhd
my_spi/hdl/xps_tft_0_wrapper.vhd
my_spi/implementation/bitgen.ut
my_spi/implementation/cache/cache.cat
my_spi/implementation/cache/clock_generator_0_wrapper.ngc
my_spi/implementation/cache/ddr_sdram_wrapper.ngc
my_spi/implementation/cache/dsocm_bram_wrapper.ngc
my_spi/implementation/cache/isocm_bram_wrapper.ngc
my_spi/implementation/cache/jtagppc_cntlr_0_wrapper.ngc
my_spi/implementation/cache/plb0_wrapper.ngc
my_spi/implementation/cache/plb_bram_if_cntlr_1_bram_wrapper.ngc
my_spi/implementation/cache/ppc405_0_docm_cntlr_wrapper.ngc
my_spi/implementation/cache/ppc405_0_docm_wrapper.ngc
my_spi/implementation/cache/ppc405_0_dplb1_wrapper.ngc
my_spi/implementation/cache/ppc405_0_iocm_cntlr_wrapper.ngc
my_spi/implementation/cache/ppc405_0_iocm_wrapper.ngc
my_spi/implementation/cache/ppc405_0_iplb1_wrapper.ngc
my_spi/implementation/cache/ppc405_0_wrapper.ngc
my_spi/implementation/cache/proc_sys_reset_0_wrapper.ngc
my_spi/implementation/cache/rs232_wrapper.ngc
my_spi/implementation/cache/xps_bram_if_cntlr_1_wrapper.ngc
my_spi/implementation/cache/xps_gpio_0_wrapper.ngc
my_spi/implementation/cache/xps_spi_0_wrapper.ngc
my_spi/implementation/cache/xps_tft_0_wrapper.ngc
my_spi/implementation/clock_generator_0_wrapper.ngc
my_spi/implementation/clock_generator_0_wrapper.ngc_xst.xrpt
my_spi/implementation/clock_generator_0_wrapper_vhdl.prj
my_spi/implementation/ddr_sdram_wrapper/ddr_sdram_wrapper.ngc
my_spi/implementation/ddr_sdram_wrapper/ddr_sdram_wrapper.ucf
my_spi/implementation/ddr_sdram_wrapper/xlnx_auto_0.ise
my_spi/implementation/ddr_sdram_wrapper.blc
my_spi/implementation/ddr_sdram_wrapper.ngc
my_spi/implementation/ddr_sdram_wrapper.ngc_xst.xrpt
my_spi/implementation/ddr_sdram_wrapper_vhdl.prj
my_spi/implementation/download.bit
my_spi/implementation/dsocm_bram_wrapper.ngc
my_spi/implementation/dsocm_bram_wrapper.ngc_xst.xrpt
my_spi/implementation/dsocm_bram_wrapper_vhdl.prj
my_spi/implementation/fpga.flw
my_spi/implementation/isocm_bram_wrapper.ngc
my_spi/implementation/isocm_bram_wrapper.ngc_xst.xrpt
my_spi/implementation/isocm_bram_wrapper_vhdl.prj
my_spi/implementation/jtagppc_cntlr_0_wrapper.ngc
my_spi/implementation/jtagppc_cntlr_0_wrapper.ngc_xst.xrpt
my_spi/implementation/jtagppc_cntlr_0_wrapper_vhdl.prj
my_spi/implementation/netlist.lst
my_spi/implementation/plb0_w

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