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文件名称:S27_SDRAM_IP

  • 所属分类：
    Driver Develop
  • 标签属性：
    [PDF]
  • 上传时间：
    2017-02-23
  • 文件大小：
    6.53mb
  • 已下载：
    0次
  • 提 供 者：
    夜****
  • 相关连接：
    无
  • 下载说明：
    别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容来自于网络，使用问题请自行百度

SDRAM 驱动读写demo，用verilog写的上板测试过-SDRAM　verilog
(系统自动生成,下载前可以参看下载内容)

下载文件列表

S27_SDRAM_IP/sdram_4m16_LX45_80M/rtl/Command.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/rtl/control_interface.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/rtl/Params.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/rtl/sdram.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/rtl/sdram_driver.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/rtl/sdr_data_path.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/rtl/sdr_sdram.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/Command.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/control_interface.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/coregen.cgc
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/coregen.cgp
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/coregen.log
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/coregen.rsp
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/create_sdram.tcl
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.asy
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.gise
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.ncf
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.ngc
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.veo
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.vhd
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.vho
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.xco
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram.xise
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram_flist.txt
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram_readme.txt
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/icon_sdram_xmdf.tcl
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.asy
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.cdc
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.gise
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.ncf
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.ngc
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.veo
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.vhd
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.vho
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.xco
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram.xise
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram_flist.txt
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram_readme.txt
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/ila_sdram_xmdf.tcl
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/clk_wiz_readme.txt
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/doc/clk_wiz_ds709.pdf
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/doc/clk_wiz_gsg521.pdf
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/example_design/pll_exdes.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/example_design/pll_exdes.vhd
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/implement/implement.bat
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/implement/implement.sh
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/implement/xst.prj
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/implement/xst.scr
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/pll.ucf
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/functional/simcmds.tcl
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/functional/simulate_isim.sh
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/functional/simulate_mti.do
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/functional/simulate_ncsim.sh
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/functional/simulate_vcs.sh
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/functional/ucli_commands.key
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/functional/vcs_session.tcl
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/functional/wave.do
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/functional/wave.sv
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/pll_tb.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll/simulation/pll_tb.vhd
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll.asy
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll.ejp
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll.gise
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll.ncf
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll.v
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll.veo
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll.vhd
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll.vho
S27_SDRAM_IP/sdram_4m16_LX45_80M/sdram_LX45/ipcore_dir/pll.xco
S27_SDRAM_IP/sdr

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