8-3优先编码，
1、学会用Verilog语言的描述方式来设计电路；
2、熟悉8—3优先编码器，并用Verilog语言实现其功能；
3、掌握Cyclone系列FPGA的程序加载，熟练掌握将.sof文件加载到实验箱中，实现8—3优先编码器的效果。(8-3 priority coding,
1. Learn to design the circuit with Verilog descr iption;
2. Familiar with 8-3 priority encoder and implement its functions in Verilog language;
3. Master the procedure load of Cyclone series FPGA, and master the effect of loading.sof files into the experiment box to achieve the effect of 8-3 priority encoder.)