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文件名称:sdram_2port_FPGA

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  • 上传时间:
    2018-03-02
  • 文件大小:
    284kb
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    0次
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编写SDRAM程序,实现FPGA芯片与SDRAM芯片的链接(Write the SDRAM program to link the link between the FPGA chip and the SDRAM chip)
相关搜索: SDRAM接口程序

(系统自动生成,下载前可以参看下载内容)

下载文件列表

文件名大小更新时间
sdram_2port_FPGA\db\SDRAM_HR_HW.db_info 155 2018-01-02
sdram_2port_FPGA\db\SDRAM_HR_HW.ipinfo 178 2018-01-02
sdram_2port_FPGA\db\SDRAM_HR_HW.sld_design_entry.sci 217 2018-01-02
sdram_2port_FPGA\db\SDRAM_HR_HW_global_asgn_op.abo 428406 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.db_info 155 2017-12-24
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.cmp.atm 62031 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.cmp.dfp 33 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.cmp.hdbx 11424 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.cmp.kpt 341 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.cmp.logdb 4 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.cmp.rcf 15494 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.map.atm 50194 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.map.dpi 4381 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.map.hdbx 10554 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.map.kpt 122657 2011-11-28
sdram_2port_FPGA\incremental_db\compiled_partitions\SDRAM_HR_HW.root_partition.merge_hb.atm 15876 2011-11-28
sdram_2port_FPGA\incremental_db\README 653 2011-11-28
sdram_2port_FPGA\Sdram_Control_2Port\command.v 17008 2008-01-27
sdram_2port_FPGA\Sdram_Control_2Port\control_interface.v 5812 2008-01-27
sdram_2port_FPGA\Sdram_Control_2Port\Sdram_Controller.v 7799 2011-09-28
sdram_2port_FPGA\Sdram_Control_2Port\Sdram_Controller.v.bak 7906 2008-04-16
sdram_2port_FPGA\Sdram_Control_2Port\Sdram_Params.h 1542 2008-01-27
sdram_2port_FPGA\Sdram_Control_2Port\Sdram_PLL.v 13989 2008-04-16
sdram_2port_FPGA\Sdram_Control_2Port\sdr_data_path.v 1228 2008-01-27
sdram_2port_FPGA\Sdram_Control_2Port\transcript 454 2008-04-16
sdram_2port_FPGA\sdram_hr.bdf 12130 2011-09-28
sdram_2port_FPGA\SDRAM_HR_HW.asm.rpt 8819 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.bsf 3863 2008-12-30
sdram_2port_FPGA\SDRAM_HR_HW.done 26 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.dpf 239 2008-04-16
sdram_2port_FPGA\SDRAM_HR_HW.fit.rpt 193105 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.fit.smsg 513 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.fit.summary 613 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.flow.rpt 7640 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.map.rpt 104790 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.map.smsg 152 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.map.summary 465 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.pin 58153 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.pof 2097339 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.qpf 912 2008-04-16
sdram_2port_FPGA\SDRAM_HR_HW.qsf 5549 2017-12-24
sdram_2port_FPGA\SDRAM_HR_HW.qsf.bak 2026 2008-04-16
sdram_2port_FPGA\SDRAM_HR_HW.qws 813 2018-01-02
sdram_2port_FPGA\SDRAM_HR_HW.sof 841090 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.tan.rpt 156312 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.tan.summary 1938 2011-11-28
sdram_2port_FPGA\SDRAM_HR_HW.v 3403 2008-12-30
sdram_2port_FPGA\SDRAM_HR_HW.v.bak 3417 2008-12-30
sdram_2port_FPGA\SDRAM_HR_HW_assignment_defaults.qdf 37880 2008-12-30
sdram_2port_FPGA\SEG7_LUT\SEG7_LUT.v 935 2008-04-16
sdram_2port_FPGA\SEG7_LUT\SEG7_LUT_8.v 1158 2008-04-16
sdram_2port_FPGA\setup.tcl 2494 2011-09-28
sdram_2port_FPGA\setup.tcl.bak 2494 2011-09-28
sdram_2port_FPGA\实验与使用说明.txt 376 2011-09-28
sdram_2port_FPGA\incremental_db\compiled_partitions 0 2017-12-24
sdram_2port_FPGA\db 0 2018-01-02
sdram_2port_FPGA\incremental_db 0 2017-12-24
sdram_2port_FPGA\Sdram_Control_2Port 0 2017-12-24
sdram_2port_FPGA\SEG7_LUT 0 2017-12-24
sdram_2port_FPGA 0 2018-01-02

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