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用ＶＨＤＬ语言实现８位十进制计数器的设计，计数结果用实验板上8个数码管显示
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1002016p_Sa_5
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1002016p_Sa_5/cnt10.vhd
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1002016p_Sa_5/king8.gdf
1002016p_Sa_5/LED.VHD
1002016p_Sa_5/MUX8.VHD
1002016p_Sa_5/1002016_EDA实验报告五.doc
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