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文件名称:risc

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    2012-11-16
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    1.2mb
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基于quartus II软件

用verilog 语言描述的精简指令CPU-quartus II verilog
相关搜索: risc

(系统自动生成,下载前可以参看下载内容)

下载文件列表

risc/Design+of+RISC+Processor.ppt
risc/image001.gif
risc/risc/address_register.v
risc/risc/alu.v
risc/risc/control_unit.v
risc/risc/control_unit.v.bak
risc/risc/db/prev_cmp_risc.asm.qmsg
risc/risc/db/prev_cmp_risc.fit.qmsg
risc/risc/db/prev_cmp_risc.map.qmsg
risc/risc/db/prev_cmp_risc.qmsg
risc/risc/db/prev_cmp_risc.tan.qmsg
risc/risc/db/risc.(0).cnf.cdb
risc/risc/db/risc.(0).cnf.hdb
risc/risc/db/risc.(1).cnf.cdb
risc/risc/db/risc.(1).cnf.hdb
risc/risc/db/risc.(10).cnf.cdb
risc/risc/db/risc.(10).cnf.hdb
risc/risc/db/risc.(11).cnf.cdb
risc/risc/db/risc.(11).cnf.hdb
risc/risc/db/risc.(2).cnf.cdb
risc/risc/db/risc.(2).cnf.hdb
risc/risc/db/risc.(3).cnf.cdb
risc/risc/db/risc.(3).cnf.hdb
risc/risc/db/risc.(4).cnf.cdb
risc/risc/db/risc.(4).cnf.hdb
risc/risc/db/risc.(5).cnf.cdb
risc/risc/db/risc.(5).cnf.hdb
risc/risc/db/risc.(6).cnf.cdb
risc/risc/db/risc.(6).cnf.hdb
risc/risc/db/risc.(7).cnf.cdb
risc/risc/db/risc.(7).cnf.hdb
risc/risc/db/risc.(8).cnf.cdb
risc/risc/db/risc.(8).cnf.hdb
risc/risc/db/risc.(9).cnf.cdb
risc/risc/db/risc.(9).cnf.hdb
risc/risc/db/risc.asm.qmsg
risc/risc/db/risc.asm_labs.ddb
risc/risc/db/risc.cbx.xml
risc/risc/db/risc.cmp.bpm
risc/risc/db/risc.cmp.cdb
risc/risc/db/risc.cmp.ecobp
risc/risc/db/risc.cmp.hdb
risc/risc/db/risc.cmp.logdb
risc/risc/db/risc.cmp.rdb
risc/risc/db/risc.cmp.tdb
risc/risc/db/risc.cmp0.ddb
risc/risc/db/risc.db_info
risc/risc/db/risc.eco.cdb
risc/risc/db/risc.fit.qmsg
risc/risc/db/risc.hier_info
risc/risc/db/risc.hif
risc/risc/db/risc.map.bpm
risc/risc/db/risc.map.cdb
risc/risc/db/risc.map.ecobp
risc/risc/db/risc.map.hdb
risc/risc/db/risc.map.logdb
risc/risc/db/risc.map.qmsg
risc/risc/db/risc.map_bb.cdb
risc/risc/db/risc.map_bb.hdb
risc/risc/db/risc.map_bb.hdbx
risc/risc/db/risc.map_bb.logdb
risc/risc/db/risc.pre_map.cdb
risc/risc/db/risc.pre_map.hdb
risc/risc/db/risc.psp
risc/risc/db/risc.root_partition.cmp.atm
risc/risc/db/risc.root_partition.cmp.dfp
risc/risc/db/risc.root_partition.cmp.hdbx
risc/risc/db/risc.root_partition.cmp.logdb
risc/risc/db/risc.root_partition.cmp.rcf
risc/risc/db/risc.root_partition.map.atm
risc/risc/db/risc.root_partition.map.hdbx
risc/risc/db/risc.root_partition.map.info
risc/risc/db/risc.rpp.qmsg
risc/risc/db/risc.rtlv.hdb
risc/risc/db/risc.rtlv_sg.cdb
risc/risc/db/risc.rtlv_sg_swap.cdb
risc/risc/db/risc.sgate.rvd
risc/risc/db/risc.sgate_sm.rvd
risc/risc/db/risc.sgdiff.cdb
risc/risc/db/risc.sgdiff.hdb
risc/risc/db/risc.signalprobe.cdb
risc/risc/db/risc.sld_design_entry.sci
risc/risc/db/risc.sld_design_entry_dsc.sci
risc/risc/db/risc.smp_dump.txt
risc/risc/db/risc.syn_hier_info
risc/risc/db/risc.tan.qmsg
risc/risc/db/risc.tis_db_list.ddb
risc/risc/d_flipflop.v
risc/risc/instruction_register.v
risc/risc/memory_unit.v
risc/risc/memory_unit.v.bak
risc/risc/multiplexer_3ch.v
risc/risc/multiplexer_3ch.v.bak
risc/risc/multiplexer_5ch.v
risc/risc/processing_unit.v
risc/risc/processing_unit.v.bak
risc/risc/program_counter.v
risc/risc/register_unit.v
risc/risc/risc.asm.rpt
risc/risc/risc.done
risc/risc/risc.fit.rpt
risc/risc/risc.fit.smsg
risc/risc/risc.fit.summary
risc/risc/risc.flow.rpt
risc/risc/risc.map.rpt
risc/risc/risc.map.smsg
risc/risc/risc.map.summary
risc/risc/risc.pin
risc/risc/risc.pof
risc/risc/risc.qpf
risc/risc/risc.qsf
risc/risc/risc.qws
risc/risc/risc.sof
risc/risc/risc.tan.rpt
risc/risc/risc_cpu
risc/risc/risc_cpu.bak
risc/risc/risc_cpu.cr.mti
risc/risc/risc_cpu.mpf
risc/risc/risc_cpu.v.bak
risc/risc/RISC_SPM.v
risc/risc/tb_risc.v
risc/risc/tb_risc.v.bak
risc/risc/vsim.wlf
risc/risc/work/@r@i@s@c_@s@p@m/verilog.asm
risc/risc/work/@r@i@s@c_@s@p@m/_primary.dat
risc/risc/work/@r@i@s@c_@s@p@m/_primary.vhd
risc/risc/work/address_register/verilog.asm
risc/risc/work/address_register/_primary.dat
risc/risc/work/address_register/_primary.vhd
risc/risc/work/alu_risc/verilog.asm
risc/risc/work/alu_risc/_primary.dat
risc/risc/work/alu_risc/_primary.vhd
risc/risc/work/control_unit/verilog.asm
risc/risc/work/control_unit/_primary.dat
risc/risc/work/control_unit/_primary.vhd
risc/risc/work/d_flipflop/verilog.asm
risc/risc/work/d_flipflop/_primary.dat
risc/risc/work/d_flipflop/_primary.vhd
risc/risc/work/instruction_register/verilog.asm
risc/risc/work/instruction_register/_primary.dat
risc/risc/work/instruction_register/_primary.vhd
risc/risc/work/memory_unit/verilog.asm
risc/risc/work/memory_unit/_primary.dat
risc/risc/work/memory_unit/_primary.vhd
risc/risc/work/multiplexer_3ch/verilog.asm
risc/risc/work/multiplexer_3ch/_primary.dat
risc/risc/work/multiplexer_3ch/_primary.vhd
risc/risc/work/multiplexer_5ch/verilog.asm
risc/risc/work/multiplexer_5ch/_primary.dat
risc/risc/work/multiplexer_5ch/_primary.vhd
risc/risc/work/processing_unit/verilog.asm
risc/risc/work/processing_unit/_primary.dat
risc/risc/work/processing_unit/_primary.vhd
risc/risc/work/program_counter/verilog.asm
risc/risc/work/program_counter/_primary.dat
risc/risc/work/program_counter/_primary.vhd
risc/risc/work/register_unit/verilog.asm
risc/risc/work/register_unit/_primary.dat
risc/risc/work/register_unit/_primary.vhd
risc/risc/work/tb_risc/verilog.asm
risc/risc/work/tb_risc/_primary.dat
risc/risc/wo

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