60进制加法计数器设计时主要采用数电知识，采用清零法和反馈置数法进行电路设计。用两片74161，采用反馈清零法进行电路设计，此时相当于设计两个加法计数器，左边的是高位片，此时的高位片在电路中相当于是一片六进制的加法计数器，逢六进清零，右边的是低位片，相当于一个十进制的加法计数器，逢十清零，此电路采用置零法与反馈清零法用multisim中进行仿真-60 Counter-band adder design using a number of major electricity knowledge, the use of zero and a few home feedback circuit design method. 2 with 74,161, the Clear Law feedback circuit design, design at this time is equivalent to adding two counters, the left side of the film are high, this time at the high-chip circuits are equivalent to an addition of six hexadecimal counter, every six Clear into the right are the low-chip, which is equivalent to the addition of a decimal counter, every ten cleared, the circuit method and the feedback nulling Clear method in simulation using multisim