文件名称:sdram_vhdl_lattice
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- 上传时间:2012-11-16
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文件大小:360.61kb
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sdram的控制程序,程序分为控制端口模块、时钟模块、数据传输模块及刷新等模块-sdram control procedures, process control port is divided into modules, clock modules, data transfer module and refresh modules
(系统自动生成,下载前可以参看下载内容)
下载文件列表
sdram_vhdl_lattice/LIB.DLS
sdram_vhdl_lattice/rd1007.pdf
sdram_vhdl_lattice/sd_cnfg.acf
sdram_vhdl_lattice/sd_cnfg.cnf
sdram_vhdl_lattice/sd_cnfg.fit
sdram_vhdl_lattice/sd_cnfg.hif
sdram_vhdl_lattice/sd_cnfg.jam
sdram_vhdl_lattice/sd_cnfg.jbc
sdram_vhdl_lattice/sd_cnfg.mmf
sdram_vhdl_lattice/sd_cnfg.ndb
sdram_vhdl_lattice/sd_cnfg.pin
sdram_vhdl_lattice/sd_cnfg.pof
sdram_vhdl_lattice/sd_cnfg.rpt
sdram_vhdl_lattice/sd_cnfg.snf
sdram_vhdl_lattice/SD_CNFG.sym
sdram_vhdl_lattice/Sd_cnfg.vhd
sdram_vhdl_lattice/sd_rfrsh(1).cnf
sdram_vhdl_lattice/sd_rfrsh(2).cnf
sdram_vhdl_lattice/sd_rfrsh(3).cnf
sdram_vhdl_lattice/sd_rfrsh(4).cnf
sdram_vhdl_lattice/sd_rfrsh(5).cnf
sdram_vhdl_lattice/sd_rfrsh(6).cnf
sdram_vhdl_lattice/sd_rfrsh.acf
sdram_vhdl_lattice/sd_rfrsh.cnf
sdram_vhdl_lattice/sd_rfrsh.fit
sdram_vhdl_lattice/sd_rfrsh.hif
sdram_vhdl_lattice/sd_rfrsh.jam
sdram_vhdl_lattice/sd_rfrsh.jbc
sdram_vhdl_lattice/sd_rfrsh.mmf
sdram_vhdl_lattice/sd_rfrsh.ndb
sdram_vhdl_lattice/sd_rfrsh.pin
sdram_vhdl_lattice/sd_rfrsh.pof
sdram_vhdl_lattice/sd_rfrsh.rpt
sdram_vhdl_lattice/sd_rfrsh.snf
sdram_vhdl_lattice/SD_RFRSH.sym
sdram_vhdl_lattice/Sd_rfrsh.vhd
sdram_vhdl_lattice/sd_sig.acf
sdram_vhdl_lattice/sd_sig.hif
sdram_vhdl_lattice/Sd_sig.vhd
sdram_vhdl_lattice/sd_state(1).cnf
sdram_vhdl_lattice/sd_state(2).cnf
sdram_vhdl_lattice/sd_state(3).cnf
sdram_vhdl_lattice/sd_state(4).cnf
sdram_vhdl_lattice/sd_state(5).cnf
sdram_vhdl_lattice/sd_state.acf
sdram_vhdl_lattice/sd_state.cnf
sdram_vhdl_lattice/sd_state.fit
sdram_vhdl_lattice/sd_state.hif
sdram_vhdl_lattice/sd_state.jam
sdram_vhdl_lattice/sd_state.jbc
sdram_vhdl_lattice/sd_state.mmf
sdram_vhdl_lattice/sd_state.ndb
sdram_vhdl_lattice/sd_state.pin
sdram_vhdl_lattice/sd_state.pof
sdram_vhdl_lattice/sd_state.rpt
sdram_vhdl_lattice/sd_state.snf
sdram_vhdl_lattice/SD_STATE.sym
sdram_vhdl_lattice/Sd_state.vhd
sdram_vhdl_lattice/sd_top.acf
sdram_vhdl_lattice/sd_top.hif
sdram_vhdl_lattice/Sd_top.vhd
sdram_vhdl_lattice/U0750024.DLS
sdram_vhdl_lattice/U3831423.DLS
sdram_vhdl_lattice/U5442055.DLS
sdram_vhdl_lattice/U5492444.DLS
sdram_vhdl_lattice/U5679513.DLS
sdram_vhdl_lattice/U6435128.DLS
sdram_vhdl_lattice/U7025646.DLS
sdram_vhdl_lattice/U9146771.DLS
sdram_vhdl_lattice/U9392154.DLS
sdram_vhdl_lattice
sdram_vhdl_lattice/rd1007.pdf
sdram_vhdl_lattice/sd_cnfg.acf
sdram_vhdl_lattice/sd_cnfg.cnf
sdram_vhdl_lattice/sd_cnfg.fit
sdram_vhdl_lattice/sd_cnfg.hif
sdram_vhdl_lattice/sd_cnfg.jam
sdram_vhdl_lattice/sd_cnfg.jbc
sdram_vhdl_lattice/sd_cnfg.mmf
sdram_vhdl_lattice/sd_cnfg.ndb
sdram_vhdl_lattice/sd_cnfg.pin
sdram_vhdl_lattice/sd_cnfg.pof
sdram_vhdl_lattice/sd_cnfg.rpt
sdram_vhdl_lattice/sd_cnfg.snf
sdram_vhdl_lattice/SD_CNFG.sym
sdram_vhdl_lattice/Sd_cnfg.vhd
sdram_vhdl_lattice/sd_rfrsh(1).cnf
sdram_vhdl_lattice/sd_rfrsh(2).cnf
sdram_vhdl_lattice/sd_rfrsh(3).cnf
sdram_vhdl_lattice/sd_rfrsh(4).cnf
sdram_vhdl_lattice/sd_rfrsh(5).cnf
sdram_vhdl_lattice/sd_rfrsh(6).cnf
sdram_vhdl_lattice/sd_rfrsh.acf
sdram_vhdl_lattice/sd_rfrsh.cnf
sdram_vhdl_lattice/sd_rfrsh.fit
sdram_vhdl_lattice/sd_rfrsh.hif
sdram_vhdl_lattice/sd_rfrsh.jam
sdram_vhdl_lattice/sd_rfrsh.jbc
sdram_vhdl_lattice/sd_rfrsh.mmf
sdram_vhdl_lattice/sd_rfrsh.ndb
sdram_vhdl_lattice/sd_rfrsh.pin
sdram_vhdl_lattice/sd_rfrsh.pof
sdram_vhdl_lattice/sd_rfrsh.rpt
sdram_vhdl_lattice/sd_rfrsh.snf
sdram_vhdl_lattice/SD_RFRSH.sym
sdram_vhdl_lattice/Sd_rfrsh.vhd
sdram_vhdl_lattice/sd_sig.acf
sdram_vhdl_lattice/sd_sig.hif
sdram_vhdl_lattice/Sd_sig.vhd
sdram_vhdl_lattice/sd_state(1).cnf
sdram_vhdl_lattice/sd_state(2).cnf
sdram_vhdl_lattice/sd_state(3).cnf
sdram_vhdl_lattice/sd_state(4).cnf
sdram_vhdl_lattice/sd_state(5).cnf
sdram_vhdl_lattice/sd_state.acf
sdram_vhdl_lattice/sd_state.cnf
sdram_vhdl_lattice/sd_state.fit
sdram_vhdl_lattice/sd_state.hif
sdram_vhdl_lattice/sd_state.jam
sdram_vhdl_lattice/sd_state.jbc
sdram_vhdl_lattice/sd_state.mmf
sdram_vhdl_lattice/sd_state.ndb
sdram_vhdl_lattice/sd_state.pin
sdram_vhdl_lattice/sd_state.pof
sdram_vhdl_lattice/sd_state.rpt
sdram_vhdl_lattice/sd_state.snf
sdram_vhdl_lattice/SD_STATE.sym
sdram_vhdl_lattice/Sd_state.vhd
sdram_vhdl_lattice/sd_top.acf
sdram_vhdl_lattice/sd_top.hif
sdram_vhdl_lattice/Sd_top.vhd
sdram_vhdl_lattice/U0750024.DLS
sdram_vhdl_lattice/U3831423.DLS
sdram_vhdl_lattice/U5442055.DLS
sdram_vhdl_lattice/U5492444.DLS
sdram_vhdl_lattice/U5679513.DLS
sdram_vhdl_lattice/U6435128.DLS
sdram_vhdl_lattice/U7025646.DLS
sdram_vhdl_lattice/U9146771.DLS
sdram_vhdl_lattice/U9392154.DLS
sdram_vhdl_lattice
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