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文件名称:usb_funct
介绍说明--下载内容来自于网络,使用问题请自行百度
USB 2.0 verilog源代码,内包含详细文档资料。-USB 2.0 verilog source code, which contains detailed documentation.
相关搜索: USB verilog
Verilog USB
verilog
USB vhdl
VHDL USB
usb 2.0verilog
USB 2.0
verilog code for usb 2.0
USB 2.0 verilog
usb_funct
(系统自动生成,下载前可以参看下载内容)
下载文件列表
usb_funct/bench/CVS/Entries
usb_funct/bench/CVS/Repository
usb_funct/bench/CVS/Root
usb_funct/bench/verilog/CVS/Entries
usb_funct/bench/verilog/CVS/Repository
usb_funct/bench/verilog/CVS/Root
usb_funct/doc/CVS/Entries
usb_funct/doc/CVS/Repository
usb_funct/doc/CVS/Root
usb_funct/doc/README.txt
usb_funct/doc/STATUS.txt
usb_funct/doc/usb_doc.pdf
usb_funct/rtl/CVS/Entries
usb_funct/rtl/CVS/Repository
usb_funct/rtl/CVS/Root
usb_funct/rtl/verilog/CVS/Entries
usb_funct/rtl/verilog/CVS/Repository
usb_funct/rtl/verilog/CVS/Root
usb_funct/rtl/verilog/usbf_crc16.v
usb_funct/rtl/verilog/usbf_crc5.v
usb_funct/rtl/verilog/usbf_defines.v
usb_funct/rtl/verilog/usbf_ep_rf.v
usb_funct/rtl/verilog/usbf_ep_rf_dummy.v
usb_funct/rtl/verilog/usbf_idma.v
usb_funct/rtl/verilog/usbf_mem_arb.v
usb_funct/rtl/verilog/usbf_pa.v
usb_funct/rtl/verilog/usbf_pd.v
usb_funct/rtl/verilog/usbf_pe.v
usb_funct/rtl/verilog/usbf_pl.v
usb_funct/rtl/verilog/usbf_rf.v
usb_funct/rtl/verilog/usbf_top.v
usb_funct/rtl/verilog/usbf_utmi_if.v
usb_funct/rtl/verilog/usbf_utmi_ls.v
usb_funct/rtl/verilog/usbf_wb.v
usb_funct/sim/CVS/Entries
usb_funct/sim/CVS/Repository
usb_funct/sim/CVS/Root
usb_funct/sim/rtl_sim/bin/CVS/Entries
usb_funct/sim/rtl_sim/bin/CVS/Repository
usb_funct/sim/rtl_sim/bin/CVS/Root
usb_funct/sim/rtl_sim/CVS/Entries
usb_funct/sim/rtl_sim/CVS/Repository
usb_funct/sim/rtl_sim/CVS/Root
usb_funct/sim/rtl_sim/run/CVS/Entries
usb_funct/sim/rtl_sim/run/CVS/Repository
usb_funct/sim/rtl_sim/run/CVS/Root
usb_funct/syn/bin/comp.dc
usb_funct/syn/bin/CVS/Entries
usb_funct/syn/bin/CVS/Repository
usb_funct/syn/bin/CVS/Root
usb_funct/syn/bin/design_spec.dc
usb_funct/syn/bin/lib_spec.dc
usb_funct/syn/bin/read.dc
usb_funct/syn/CVS/Entries
usb_funct/syn/CVS/Repository
usb_funct/syn/CVS/Root
usb_funct/syn/log/CVS/Entries
usb_funct/syn/log/CVS/Repository
usb_funct/syn/log/CVS/Root
usb_funct/syn/out/CVS/Entries
usb_funct/syn/out/CVS/Repository
usb_funct/syn/out/CVS/Root
usb_funct/syn/run/CVS/Entries
usb_funct/syn/run/CVS/Repository
usb_funct/syn/run/CVS/Root
usb_funct/sim/rtl_sim/bin/CVS
usb_funct/sim/rtl_sim/run/CVS
usb_funct/bench/verilog/CVS
usb_funct/rtl/verilog/CVS
usb_funct/sim/rtl_sim/bin
usb_funct/sim/rtl_sim/CVS
usb_funct/sim/rtl_sim/run
usb_funct/syn/bin/CVS
usb_funct/syn/log/CVS
usb_funct/syn/out/CVS
usb_funct/syn/run/CVS
usb_funct/bench/CVS
usb_funct/bench/verilog
usb_funct/doc/CVS
usb_funct/rtl/CVS
usb_funct/rtl/verilog
usb_funct/sim/CVS
usb_funct/sim/rtl_sim
usb_funct/syn/bin
usb_funct/syn/CVS
usb_funct/syn/log
usb_funct/syn/out
usb_funct/syn/run
usb_funct/bench
usb_funct/doc
usb_funct/rtl
usb_funct/sim
usb_funct/syn
usb_funct
usb_funct/bench/CVS/Repository
usb_funct/bench/CVS/Root
usb_funct/bench/verilog/CVS/Entries
usb_funct/bench/verilog/CVS/Repository
usb_funct/bench/verilog/CVS/Root
usb_funct/doc/CVS/Entries
usb_funct/doc/CVS/Repository
usb_funct/doc/CVS/Root
usb_funct/doc/README.txt
usb_funct/doc/STATUS.txt
usb_funct/doc/usb_doc.pdf
usb_funct/rtl/CVS/Entries
usb_funct/rtl/CVS/Repository
usb_funct/rtl/CVS/Root
usb_funct/rtl/verilog/CVS/Entries
usb_funct/rtl/verilog/CVS/Repository
usb_funct/rtl/verilog/CVS/Root
usb_funct/rtl/verilog/usbf_crc16.v
usb_funct/rtl/verilog/usbf_crc5.v
usb_funct/rtl/verilog/usbf_defines.v
usb_funct/rtl/verilog/usbf_ep_rf.v
usb_funct/rtl/verilog/usbf_ep_rf_dummy.v
usb_funct/rtl/verilog/usbf_idma.v
usb_funct/rtl/verilog/usbf_mem_arb.v
usb_funct/rtl/verilog/usbf_pa.v
usb_funct/rtl/verilog/usbf_pd.v
usb_funct/rtl/verilog/usbf_pe.v
usb_funct/rtl/verilog/usbf_pl.v
usb_funct/rtl/verilog/usbf_rf.v
usb_funct/rtl/verilog/usbf_top.v
usb_funct/rtl/verilog/usbf_utmi_if.v
usb_funct/rtl/verilog/usbf_utmi_ls.v
usb_funct/rtl/verilog/usbf_wb.v
usb_funct/sim/CVS/Entries
usb_funct/sim/CVS/Repository
usb_funct/sim/CVS/Root
usb_funct/sim/rtl_sim/bin/CVS/Entries
usb_funct/sim/rtl_sim/bin/CVS/Repository
usb_funct/sim/rtl_sim/bin/CVS/Root
usb_funct/sim/rtl_sim/CVS/Entries
usb_funct/sim/rtl_sim/CVS/Repository
usb_funct/sim/rtl_sim/CVS/Root
usb_funct/sim/rtl_sim/run/CVS/Entries
usb_funct/sim/rtl_sim/run/CVS/Repository
usb_funct/sim/rtl_sim/run/CVS/Root
usb_funct/syn/bin/comp.dc
usb_funct/syn/bin/CVS/Entries
usb_funct/syn/bin/CVS/Repository
usb_funct/syn/bin/CVS/Root
usb_funct/syn/bin/design_spec.dc
usb_funct/syn/bin/lib_spec.dc
usb_funct/syn/bin/read.dc
usb_funct/syn/CVS/Entries
usb_funct/syn/CVS/Repository
usb_funct/syn/CVS/Root
usb_funct/syn/log/CVS/Entries
usb_funct/syn/log/CVS/Repository
usb_funct/syn/log/CVS/Root
usb_funct/syn/out/CVS/Entries
usb_funct/syn/out/CVS/Repository
usb_funct/syn/out/CVS/Root
usb_funct/syn/run/CVS/Entries
usb_funct/syn/run/CVS/Repository
usb_funct/syn/run/CVS/Root
usb_funct/sim/rtl_sim/bin/CVS
usb_funct/sim/rtl_sim/run/CVS
usb_funct/bench/verilog/CVS
usb_funct/rtl/verilog/CVS
usb_funct/sim/rtl_sim/bin
usb_funct/sim/rtl_sim/CVS
usb_funct/sim/rtl_sim/run
usb_funct/syn/bin/CVS
usb_funct/syn/log/CVS
usb_funct/syn/out/CVS
usb_funct/syn/run/CVS
usb_funct/bench/CVS
usb_funct/bench/verilog
usb_funct/doc/CVS
usb_funct/rtl/CVS
usb_funct/rtl/verilog
usb_funct/sim/CVS
usb_funct/sim/rtl_sim
usb_funct/syn/bin
usb_funct/syn/CVS
usb_funct/syn/log
usb_funct/syn/out
usb_funct/syn/run
usb_funct/bench
usb_funct/doc
usb_funct/rtl
usb_funct/sim
usb_funct/syn
usb_funct
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