文件名称:digitaloscilloscope
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- 上传时间:2012-11-16
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文件大小:2.08mb
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This digital oscilloscope takes a MCU and FPGA as the core. We made emphases on the choice of the sampling methods and the implement of equivalent sampling as a result, our design not only has the real-time sampling mode but also can reach the highest equivalent sample rate of 200 MHz using the real-time sample rate of 1 MHz, by way of random equivalent sampling. At the same time, this system has many other functions, such as 2 mV small-signal measuring, storage and re-display of waveform, measuring frequency, selective trigger edge, output of the correction signal and so on.-This digital oscilloscope takes a MCU and FPGA as the core. We made emphases on the choice of the sampling methods and the implement of equivalent sampling as a result, our design not only has the real-time sampling mode but also can reach the highest equivalent sample rate of 200 MHz using the real-time sample rate of 1 MHz, by way of random equivalent sampling. At the same time, this system has many other functions, such as 2 mV small-signal measuring, storage and re-display of waveform, measuring frequency, selective trigger edge, output of the correction signal and so on.
相关搜索: oscilloscope
FPGA
fpga design
vhdl
signal
oscilloscope FPGA
oscilloscope fpga vhdl
digitaloscilloscope
signal and system
frequency
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数字示波器的FPGA实现(VHDL编写 Quartus7.1测试通过)/使用说明请参看右侧注释====〉〉.txt
数字示波器的FPGA实现(VHDL编写 Quartus7.1测试通过)/数字示波器的FPGA实现(VHDL编写_Quartus7.1测试通过).part1.rar
数字示波器的FPGA实现(VHDL编写 Quartus7.1测试通过)/数字示波器的FPGA实现(VHDL编写_Quartus7.1测试通过).part2.rar
数字示波器的FPGA实现(VHDL编写 Quartus7.1测试通过)
数字示波器的FPGA实现(VHDL编写 Quartus7.1测试通过)/数字示波器的FPGA实现(VHDL编写_Quartus7.1测试通过).part1.rar
数字示波器的FPGA实现(VHDL编写 Quartus7.1测试通过)/数字示波器的FPGA实现(VHDL编写_Quartus7.1测试通过).part2.rar
数字示波器的FPGA实现(VHDL编写 Quartus7.1测试通过)
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