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communications_2
- 用vhdl代码描述的通信系统仿真程序。包括信源（20位m序列），crc编码（采用串行算法），加噪（用22位m序列产生稀疏的1，然后和编码后的数据异或），crc解码，数据串行输出。 -Vhdl code with the simulation program described in the communication system. Including the source (20 m sequence), crc code (using the serial algorithm), no
Exp5_UART
- 用VHDL在SOPC试验箱中实现异步串行通讯转换，用ＶＨＤＬ硬件描述语言实现处理器CPU
uart-txblock
- vhdl实现了UART的数据发送，将八位并行数据转成串行数据输出，并加上起始位和奇偶校验位，停止位。-vhdl UART data transmission realized, the eight parallel data into serial data output, plus the start bit and parity bits, stop bits.
Serial
- 基于epm1270的串行通信vhdl代码-serial vhdl code for epm1270
eda-2009
- 9600波特率的串行口VHDL接收和发送模块，两个模块既可以单独使用。-VHDL 9600 baud serial port receive and transmit modules, two modules can be used alone.
sipo_reg5
- VHDL语言描述具有同步清零的5位串行输入并行输出移位寄存器代码-VHDL language to describe the clearing of 5 with synchronous serial input parallel output shift register code
VHDL1
- 一种利用CPLD实现波特率自动侦测的方法,介绍了数据接收模块系统,分析了波特率自动侦测原理,利用VHDL语言对其进行了编程,最后给出了仿真结果,从而推广该方法的应用。 关键词:串行通信,波特率,自动侦测,仿真结果 -CPLD realization of a use of automatic baud rate detection methodology, the data receiving module systems, analysis of the principle of au
EDA_reg
- 并行数据串行数据的VHDL程序，需要的可以看看。-VHDL serial data parallel program data, the need to look at.
Source
- 使用VHDL基于CPLD的源程序，程序的功能是做时钟的X分频，输出串行码-CPLD using VHDL source program based on the program' s function is to do X clock frequency, the output serial code
uart
- 串行异步收发接口，简称UART，是一种广泛应用的串行传输接口。这是用vhdl实现的程序，将UART分成相应的几个模块，并用顶层文件进行模块化设计。-Send and receive asynchronous serial interface, referred to as the UART, is a widely used serial transmission interface. This is achieved using vhdl procedure to the appropriat
ps2
- 用VHDL语言实现了PS/2通信协议，PS/2是一种双向同步的串行通信协议。-VHDL language using a PS/2 communication protocol, PS/2 is a two-way synchronous serial communication protocol.
8-bitinput-output-shift
- 8位串行输入，串行输出移位寄存器 VHDL-8-bit serial input, serial output shift register VHDL
UART
- xilinx官网提供的VHDL,UART串行通信模块，肯定好用，官方提供-xilinx official website provides VHDL, UART, FPGA communication module is certainly easy to use, official
jieshou
- 实现异步串行通信的接受部分，采用vhdl语言实现-Acceptance of asynchronous serial communication part, using vhdl language
send
- 采用vhdl语言编程，实现异步串行通信的发送自己定义的通信协议格式-Using vhdl language programming, asynchronous serial communication to send their own communication protocol format definition
Serial
- VHDL语言的串行通讯程序，已调试过了可以下载使用-VHDL language serial communication program, you can download have been used to debug
Proj
- verilog/vhdl 串行口232通信程序-Spartan3E开发板调试通过-verilog/vhdl serial port communication program-Spartan3E 232 development board debugging
UART_final
- 利用vhdl硬件描述语言，模拟异步通用串行接口UART的通信方式，已在fpga上实际测试，通信性能不错，有一定的参考学习价值！-Using vhdl hardware descr iption language, simulated UART asynchronous serial interface common means of communication, the actual test in fpga, communication performance is good, there i
handset
- 利用硬件描述语言vhdl模拟实现与9针ps2手柄的串行通信，完成手柄输入信号的采集。-Vhdl simulation using hardware descr iption language to achieve ps2 with 9-pin serial communication handle, the handle to complete the input signal acquisition.
SPI_Verilog
- SPI串行总线接口的VHDL代码，详细讲解实现过程。-SPI serial bus interface VHDL realization elaborate on the realization of the process.