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TLC2543.rar
- 模数转换TLC2543十二位串行芯片驱动程序，经用已得证实．用都只需根据需要修改即可．,Analog-digital conversion chip TLC2543 12 serial driver, was confirmed by the use has. Using both can be modified only as needed.
par_serial-and-serial_par-VHDL
- 并入串出移位寄存器和8路并行输出串行移位寄存器的VHDL代码，经Quartus II 5.1验证可用,String into a shift register and 8-way parallel output serial shift register of the VHDL code, the Quartus II 5.1 can be used to verify
ltc1196.rar
- TLC1196串行AD控制模块，可以实现对电压的信号采集，并以串行的方式传送到FPGA中,TLC1196 Serial AD control module can be achieved on the voltage of the signal acquisition, and serial transmission of the FPGA
ads7822
- 利用Verilog语言实现读取ADS7822模数转换芯片的串行输出数据-it is convinient for us to use A/D converter to get digital data
SDH
- SDH开销的接收处理，要求： 1， A1和A2字节为帧头指示字节，A1为“11110110”，A2为“00101000”，连续3个A1字节后跟连续3个A2字节表示SDH一帧的开始。要求自行设计状态机，从连续传输的SDH字节流中找出帧头。 2， E2字节为勤务话通道开销，用于公务联络语音通道，其比特串行速率为64KHz(8*8K=64)。要求从SDH字节流中，提取E2字节，并按照64K速率分别串行输出E2码流及时钟，其中64K时钟要求基本均匀。（输出端口包括串行数据和64K串行时钟）
vhdlad
- 基于VHDL的高速串行AD转换器控制设计与实现-VHDL-based high-speed serial AD converter control design and implementation
tlc5615
- TLC5615串行DA的驱动接口,采用verilog编程-TLC5615 driver DA serial interface using verilog programming
CRC
- 这个是我花了一个星期的CRC算法，有并行与串行的区别与时序的分析。。。。希望站长能够同意-This is a week I spent the CRC algorithm, there is the difference between parallel and serial and timing analysis. . . . Hope that regulators can not agree
8b10b_pdf
- 8b10b编解码设计的pdf文章,用于现代千兆网通信,快速串行通信.-.pdf paper
TLC549(AD)
- 基于TLC549的串行A/D转换-Based on the TLC549 serial A/D conversion
pn127
- 这是个128位的串行伪随机码发生器，还可以进一步扩充-128 This is a serial pseudo-random code generator, can be further expanded
spi
- 三线spi接口，用verilog实现，作为一个模块，可以接收并行数据，然后串行发送-Three Line spi interface, using Verilog implementation, as a module, can receive parallel data, and then send the serial
TLC548_TLC549
- TLC548的介绍应用，8位串行模数转换器TLC548_TLC549的应用-TLC548 presentation applications, 8-bit serial ADC TLC548_TLC549 Application
aa
- xilinx环境下开发vhdl语言串行接口设计-Xilinx VHDL language development environment serial interface design
micro-UARTsource_V
- UART(即Universal Asynchronous Receiver Transmitter 通用异步收发器)是广泛使用的串行数据传输协议。UART允许在串行链路上进行全双工的通信。-UART (ie Universal Asynchronous Receiver Transmitter Universal Asynchronous Receiver Transmitter) is a widely used serial data transfer protocol. UART allo
iul
- 8.1 可编程并行接口芯片8255A 8.2 可编程定时器/计数器芯片8253/8254 8.3 串行通信及可编程串行接口芯片8251A 8.4 模/数（A/D）与数模（D/A）转换技术 及其接口 -8.1 programmable parallel interface chip 8255A8.2 programmable timer/counter chip 8253/82548.3 serial communications and programmable seri
serial_multiplex
- 绝对好东西，一个VHDL写的任意宽度通用串行乘法器，以最少的资源实现乘法器功能。-Definitely a good thing, a VHDL to write arbitrary width universal serial multiplier, the least amount of resources to achieve multiplier function.
uart_regs
- UART串行通讯FPGA实现，新手上道请多多指教-FPGA realization of UART serial communication, and newcomers on the Road, please advice
LTC1196
- 实现ltc1196,并将串行输出的改为并行输出-Achieve ltc1196, serial and parallel output of the changed output
BFL_Encode
- 将宽度为width位的并行输入数据按BiΦ-L码(曼彻斯特码)方式进行编码后串行输出，输出数据的宽度为(2*width)，BiΦ-L码是PCM码的一种，常用的PCM编码方式有：NRZ-L,BiΦ-L和BiΦ-M三种-The width of the parallel-bit width input data by BiΦ-L code (Manchester code) way encoded serial output, the output data width (2* width), Bi