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Interpolator-of-polyphase-filter
- 代码用两种方法设计了一个基于多相滤波的内插器,低通滤波器采用128阶凯撒窗,内插倍数32,并且给定信号范围,验证了内插器的正确性,画出了内插前后信号的频谱。-The code design the interpolator based on polyphase filter using two methods.The low pass filter is 128 order Caesar window and interpolation multiple is 32.I give the ran
vhdl
- cic 滤波器,vhdl代码 ,内插与抽取-cic filter ,vhdl code about decination and interpolation
neicha
- 应用时域内插公式模拟用理想低通滤波器由离散序列恢复模拟信号的编程-Application time domain interpolation formula simulation with ideal low-pass filter by discrete sequence recovery analog signal programming
matlab
- 在采样点之间的频率响应是由各采样点的加权内插函数叠加而形成的,因而有一定的逼近误差。该误差大小取决于理想频率响应的形状,理想频响特性变化越平缓,内插值越接近理想值,逼近误差越小;反之,如果采样点之间的理想频响特性变化越陡,则内插值与理想值之间的误差越大,因而在理想滤波器不连续点的两边,就会产生尖峰,而在通带和阻带就会产生波纹。用频率采样法设计的实际滤波器频率响应如图1所示。由图1可知,实际滤波器的阻带衰减取决于内插函数第一旁瓣幅度值的大小,其大小决定了所设计的滤波器的阻带性能。-Interpol
FIR-and-IIR-filter
- 给出了基于频率采样、最小二乘、内插法、最优化法、升余弦法等设计的FIR和IIR滤波器范例-Based on the frequency of sampling, least squares, interpolation, optimization method, raised cosine law design FIR and IIR filter example
Channelized-emission-signal
- 对信号进行内插处理,有16个复信号:1~16Hz;内插I=16 ;内插前采样率50Hz;滤波器265阶 。-Interpolation processing signal 16 multiplexed signals: 1 Hz to 16 Hz interpolated I = 16 before interpolation sampling rate of 50Hz filter 265 order.
duc
- 实现内插数字上变频 内插 低通滤波器的子程序 整个系统的调试-Upconverting interpolation interpolated digital low-pass filter of the subroutine of the entire system debugging
filter_lpm_shaping
- 4倍内插值的fir成型滤波器,语言vhdl,工程已建立,可以直接运行-4x interpolation of fir shaping filter, language vhdl, project has been established, you can directly run
interpolation_shaping_filter
- 内插成型滤波器的FPGA实现,可根据需要配置不同的内插倍数,Quarter II环境编译,可直接使用-Interpolation shaping filter FPGA, can be equipped with different interpolation factor, Quarter II compiler environment, can be used directly
CIC-filter
- 采用多级级联方法降低了对硬件运算速度的要求,有利于实时处理;采用余弦滤波器改善了阻带衰减不足;内插二阶多项式滤波器补偿了 CIC 滤波器通带内的衰减;抗混叠低通滤波器减小了混叠影响-Using multi-stage cascade approach reduces hardware requirements for computing speed, real-time processing in favor cosine filter improves the stop-band atten
36-tap-interpolation-coefficeint
- 36阶内插值滤波器系数生成Matlab程序-A little code for generating 36-tap-interpolation-coefficient.
MATLAB-SIG
- 几个有关通信系统的matlab程序,有关信号,包含:a,对抽样频率为90kHz的信号进行下抽样抗混叠滤波器设计的程序,b,信号抽样率转换的程序,c,通过补零内插对信号进行下抽样,分析抽样对信号频谱的影响的程序-Some matlab programs about communiction system,mainly about signal,a,program about filter to signal sampling without aliasing ,b,transfering sign
interpolate4
- 调制信号后4倍内插的verilog代码,用于基带成型滤波器输入数据-4 times after modulation signal interpolation verilog code, used to baseband shaping filter input data
rcos
- 基带升余弦脉冲滤波器的仿真,采用内插的方法实现-Simulation of the baseband pulse filter, using interpolation method
2805470
- 基于8PSK的调制解调,中间还有滤波器,内插器,正交调制()
SDR实验
- 信道化发射信号仿真实验,2. 设计滤波器 应用Parks-McClellan optimal FIR filter order estimation设计滤波器, 参数: 内插I=16 内插前采样率50Hz 滤波器通带截止频率16Hz, 阻带起始频率25Hz;通带和阻带期望的幅度分别为1和0,起伏为1dB和40dB; 利用Parks-McClellan方法得到的频率向量fo,幅度向量ao和权值w设计最终使用的滤波器系数(可以使用remez方法,得到指定阶数的滤波器系数)。 显然,滤波
uktofr
- 基于8PSK的调制解调,中间还有滤波器,内插器,正交调制()