搜索资源列表
SOPC_MPEG4_decorder_design
- 基于SOPC的MPEG4视频解码器的设计方案
VGA2
- 基于SOPC的VGAIP核设计又一部分讲解
SOPCVGAIP3090114
- 基于 SOPC 的 VGA IP 核设计-Based on SOPC the VGA IP core design
DE2_SD_Card_Audio
- 基于SD卡音乐播发器设计代码,SOPC技术,功能齐全的,编译成功的代码-Based on the SD card music broadcast design code, SOPC technology, full-featured, compile the code successfully
SOPCVGAIP
- 基于sopc的vga ip核设计参考文档-Based on SOPC vga ip-core design of the reference documentation
Nios_II_SOPC
- 基于Nios_II软核处理器的通信信号源SOPC设计,很有用的资料.-Nios_II soft-core processor-based communication signal source SOPC design, very useful information.
de2.1
- 这是一个基于FPGA/SOPC设计的简单串口程序,是FPGA硬件和niosII软件编程的结合。对初学者有很大的借鉴意义。在Quartus6.1和niosII6.1环境下编译通过,并且下载到板子上运行成功-This is based on FPGA/SOPC design a simple serial program is FPGA hardware and software combination niosII. Great for beginners reference. In Quartu
LCD-Drive-and-control-based-on-NIOSII
- 本文介绍了一种基于NIOS II软核处理器实现对LCD-LQ057Q3DC02控制的新方法。在设计中利用FPGA的Altera的SOPC Builder定制NIOS II软核处理器及其与显示功能相关的“软” 硬件模块来协同实现显示控制的软硬件设计。利用SOPC技术,将NIOS II CPU和LCD控制器放在同一片FPGA中,解决了通常情况下必须使用LCD 控制专用芯片才能解决LCD显示的问题。-This article describes an approach based on NIOS II
signaltapII
- 基于FPGA的SOPC设计中嵌入式逻辑分析仪的使用- FPGA-based SOPC design of the embedded logic analyzer
fequency
- 一款可用于数字频率计设计的IP核,使用该IP核科研构建基于SOPC技术的片上数字频率计,测频范围较宽。-A digital frequency meter using IP core
FPGANios_pinlvji
- 基于FPGANios_的等精度频率计设计,采用SOPC设计技术和基于Niosii嵌入式软核处理器的系统设计方案,对传统的等精度测量方法进行了改进-FPGANios_ based on accuracy, such as the frequency of the design, use of technology and SOPC design Niosii based on soft-core processor embedded system design, such as the tradi
LED
- 在ALTERA的DE 2 开发板上做的一个类似闪烁的彩灯,用了16个LEDR,可以直接下载到板子上运行,基于经典的开发平台Quartus II+SOPC Builder+Nios II IDE 做的,只要看了以后,你就会自己设计各种花样的彩灯闪烁的样子了.所用语言有多种,VHDL,C/C++等-DE 2 in the development of the ALTERA board to do a similar flickering lantern, with a 16 LEDR, can be
LED
- 本设计运用了基于 Nios II 嵌入式处理器的 SOPC 技术。系统以 ALTERA 公司的 Cyclone II 系列 FPGA 为数字平台,将微处理器、Avalon 总线、LED 点阵扫描控制器、存储器和人机接口控制器等硬件设备集中在一片 FPGA 上,利用片内硬件来实现 LED 点阵的带地址扫描,降低系统总功耗和简化 CPU 编程的同时,提高了系统的精确度、稳定性和抗干扰性能。-This design used the Nios II embedded processor based o
Nios_II_I2C
- 本源码为Nios II的开发示例,主要演示Nios II的I2C总线设计。开发环境QuartusII。 本示例十分经典,对基于SOPC开发的FPGA初学者有很大帮助。-The source code for the Nios II development of an example, the main demonstration Nios II I2C-bus design. Development environment QuartusII. This example is very cl
NIOSII_de2
- 基于SOPC的FPGA系统设计,测试数码管、LED、液晶显示屏,整个系统在DE2上运行通过,使用的是Quartus 6.1套件-FPGA-based SOPC system design, testing, digital tube, LED, LCD display, the entire system run by the DE2, using Quartus 6.1 Suite
NiosII
- 设计了基于Altera的软核NIos处理器,为架构基于SOPC的片上可编程系统提供了方便-Designed based on Altera' s soft-core NIos processor for architecture is based on SOPC chip programmable system provides a convenient
sopcIIC
- 该例子是基于sopc的IIC总线设计完整设计,分为硬件和软件部分,软件部分是用c语言编写的。该项目是个以完成的项目,据有较高的参考和经济价值。该例子是原来做过的项目。 整个项目是在Quartus II 7.0和nios IDE环境下开发。-This example is based on the IIC bus design sopc complete design, divided into hardware and software, the software part is writt
194
- 基于SOPC技术的虚拟彩条信号发生器的设计与实现,作者:QQ 64134703 ,电子毕业设计,欢迎咨询 -Based on SOPC technology of virtual color bar signal generator for the design and implementation of: QQ 64134703, e-graduate design, please consult
GPS
- 基于SOPC的GPS设计,全部源码,对于开发GPS有较大帮助~-The GPS-based SOPC design, all the source code, greater help for the development of GPS
DE2shijian(5)
- FPGA与SOPC设计教程:DE2实践-第五章 基于fpga的dsp设计-FPGA and SOPC design tutorials: DE2 Practice- Chapter V of the dsp fpga based design