搜索资源列表
DM_BF53x_PS2_KEYBOARD
- ADSP-BF53x 处理器利用CPLD 的I/O 资源，扩展键盘的设计方法及程序设计的实例代码。附有试验文档。设备：DM-EDU-SSKBF53x 开发板一套（DM-KIT-CBBF53x 模块，DM-KIT-EXBSSK-BF5xx 模块)， DM-TOOLS-USBICE2.0 仿真器一套，4*4 键盘.-ADSP-BF53x processor using CPLD' s I/O resources to expand the keyboard design methods a
200852016933481
- 功能强大的CPLD开发板，可作各种CPLD试验。-Powerful CPLD development board
muxcntlr
- 6446开发板的CPLD工程，带源码。CPLD的型号是EPM240GT100C5N。-6446 development board CPLD projects with source code. CPLD' s model is EPM240GT100C5N.
i2c
- 按动开发板键盘某个键CPLD将拨码开关的数据写入EEPROM的某个地址，按动另外一个键，将刚写入的数据 -- 读回CPLD，并在数码管上显-Pressing a button keyboard CPLD development board DIP switches, the data will be written to EEPROM in an address, pressing another key, the newly written data- read back CPLD, an
song
- 蜂鸣器程序，主要是实现cpld开发板上的音乐播放-Buzzer procedures, mainly to achieve development board music player cpld
cpld_sy03091
- cpld epm7128开发板原理图源程序资料-cpld epm7128 information source development board schematics
TMS320VC5402_CPLD
- 明伟 5402 DSP 开发板的CPLD源代码-Mingwei 5402 DSP development board CPLD source code
baogao
- 基于DSPC5402和CPLD的数字语音信号处理开发板原理图-DSPC5402 and CPLD based digital signal processing development board schematics
270CPLD
- PXA270的cpld源程序。 请大家看看。是armland的开发板的。-pxa270 s cpld
7duanshumaguandejingtaixianshi
- 采用Verilog语言编写实现7段数码管的静态显示，经过CPLD开发板验证，程序正确-Verilog language used to achieve a static 7-segment display, after a CPLD development board verification, the program correctly
2812_CPLD
- 基于QQ2812开发板的CPLD程序，已在Quartus_II成功调试，代码简洁。-CPLD development board based on QQ2812 procedures, has been successful in Quartus_II debugging, code clean.
3-8-yimaqi
- 38译码器程序，采用verilog语言编写，在CPLD开发板上经过验证，希望对大家有用-38 decoder program, using verilog language, proven in the CPLD development board, we hope to be useful
LCD12864
- lcd12864程序，采用Verilog语言编写，在CPLD开发板上经过验证，正确无误，实现显示英文的功能，希望对大家有用-lcd12864 procedure for the Verilog language, proven in the CPLD development board, correct, implement the function displayed in English, we hope to be useful
juzhenjianpan
- 矩阵键盘程序，采用Verilog语言编写，在CPLD开发板上经过验证，正确无误，希望对大家有用-Matrix Keyboard Program, the use of Verilog language, the CPLD development board verified and correct, we hope to be useful
PWMPLED
- 程序正确无误，采用Verilog语言编写，并在CPLD开发板上经过验证，希望对大家有用-Program is correct, the use of Verilog language, and proven in the CPLD development board, we hope to be useful
chufaqi
- 除法器程序，采用Verilog语言编写，并在CPLD开发板上经过验证，正确无误，希望对大家有用-Divider procedure for the Verilog language, and CPLD development board verified and correct, we hope to be useful
fengmingqi
- 蜂鸣器程序，采用Verilog语言编写，在CPLD开发板上经过验证，希望对大家有所帮助-Buzzer procedure for the Verilog language, proven in the CPLD development board, we hope to help
CPLD1270-I2C
- I2C总线是一种非常常用的串行总线，它操作简便，占用接口少。本程序介绍操作一个I2C总线接口的EEPROM AT24C02的方法，使用户了解I2C总线协议和读写方法。 实验过程是：按动开发板键盘某个键CPLD将拨码开关的数据写入EEPROM的某个地址，按动另外一个键，将刚写入的数据读回CPLD，并在数码管上显示。(sw0为写入，sw1为读出）-I2C bus is a very popular serial bus, it is simple, taking less interface.
Debounce
- VHDL编写。在CPLK开发板上设计的数字钟的去抖动电路。该模块相对独立，是学习去抖动的好资料。该模块跟我其它的8个模块配套构成一个数字钟。-Programmed with VHDL.A debouncing circuit which is part of a digital clock designed on a CPLD development board.The module is independent from others and is useful for learning de
Displayer
- VHDL编写的针对八段数码管的显示译码电路。实现动态扫描输出小时、分钟和秒。是基于CPLD开发板设计的一个数字钟的一部分。-Programmed with VHDL.The decoding and displaying circuit for 8-segments displayer.It outputs the data of hour,minute and second in order with dynamic scaning method.It is one of my total 9