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dispdecoder
- verilog写的数字频率计的显示模块,可以-written in Verilog Digital Cymometer display module can be
MFSK
- 多进制数字频率调制(MFSK)系统VHDL程序-Multi-band digital frequency modulation (MFSK) system VHDL procedures
Digital_freq_tester
- VHDL编写的数字显示型频率测试仪，用数码管显示-VHDL figures prepared frequency tester, digital display
AD9954
- 1、直接数字频率合成的单片机代码。 2、重要采用ADI公司提出的DDS芯片AD9954来实现直接数字频率合成。-1, Direct Digital Synthesis of single-chip code. 2, it is important to the use of ADI
sscye
- 二阶数字谐振器的频率特性和滤波器的幅频特性和相位特性和预畸变在双线性变换中的作用-Second-order digital resonator frequency filter characteristics and amplitude-frequency characteristics and phase characteristics and pre-distortion in the bilinear transform the role of
FIRdesign
- FIR数字滤波器的设计方法主要是建立在对理想滤波器频率特性作某种近似的基础上的。这些近似方法有窗函数法、频率抽样法、最佳一致逼近法。在这里只讨论窗函数法。程序中也是采用了这种方法。-FIR digital filter design method is mainly based on the frequency characteristics of the ideal filter for some kind of approximation on the basis of. These app
cymometer
- 采用VerilogHDL语言编写的数字频率计-VerilogHDL languages using digital frequency meter
DDSdevelop
- 此为使用DDS直接数字频率合成器之设计报告,作者相当的详细介绍DDS之原理以及使用Altera之FPGA做设计,供使用者参考.-This is the use of DDS Direct Digital Synthesizer Design report, the authors considerable detail on the principle of DDS and the use of Altera
DDS
- 《DDS 原理简介》，DDS即直接数字频率合成器原理简介及系统设计与实现- DDS Principle , DDS direct digital synthesizer Principle and System Design and Implementation
AD9851
- 直接数字频率合成,我在全国电子设计大赛的时候所用的程序-Direct Digital Synthesis, I Electronics Design Contest in the country when the procedures used
123
- IIR数字滤波器的设计，抽样频率为2*pi*1.5*10^4,通带截止频率为2*pi*1.5*10^3-IIR digital filter design, sampling frequency of 2* pi* 1.5* 10 ^ 4, pass-band cut-off frequency of 2* pi* 1.5* 10 ^ 3
111
- 数字鉴相器,数字锁相环频率合成系统FPGA的实现,很有借鉴价值-Digital phase detector, digital PLL frequency synthesizer system FPGA realization of referential value
frequency
- 基于凌阳单片机的简易语音数字频率计源码.实验了语音播报测量的频率,幅度值等.-Sunplus based on a simple single-chip voice Digital Cymometer source. Experimental measurement voice broadcast frequency and magnitude of value.
pll
- 关于数字锁相环方面的代码,觉得还可以，或许对大家有用-the code of the pll
dds
- 直接数字频率直接数字频率合成器(DDS) -dds
Chebyshev1IIRdigitalfilter
- 这是本人夏季学期的课程设计：模拟信号数字化滤波处理的计算仿真-Chebyshev I型低通滤波，对模拟信号进行数字化滤波处理。根据数字滤波器的性能指标，计算出Chebyshev1型低通IIR数字滤波器的系统函数，画出数字滤波器的频率响应曲线，给出Chebyshev1型低通IIR数字滤波器的设计结果。-This is my summer semester of the curriculum design: analog signal processing digital simulation f
PINLV-new
- 数字频率计程序，网上下载后已改动过，能用-Digital Cymometer procedures, on-line has been altered after the download, can be
test1
- 4位数字频率计的verilog HDL设计，精度比较准的-4-digit Cymometer verilog HDL design, the accuracy of the quasi-comparison
testt2
- 由单片机和CPLD共同构成7位数字频率计-By the MCU and CPLD together seven digital frequency meter
ddsdds
- 直接数字频率合成，可以直接输出所需要的波形-Direct digital synthesizer, you can direct output of the waveform required