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sample8
- 运行在FPGA上的Verilog程序,实现对ADC的控制。在控制模块提供的时钟及控制信号下工作,完成模拟信号的量化和编码。
ADControl
- 此程序为Verilog控制ADC的全部程序,已检验可以应用
ADCtest
- 利用Verilog HDL对AD7705进行控制ADC采样,实验室师兄的
CPLD读取ADS7886
- CPLD读取Ti串行ADC芯片ADSL7886的Verilog代码
ADS8328
- 高速精密ADC,TI公司的ADS8328的FPGA控制程序,使用verilog语言-High-speed precision ADC, TI s ADS8328 control program the FPGA using verilog language
adc_verilog
- 用verilog编写的ADC控制接口,只需根据具体ADC器件的时序图修改代码就可运行。-ADC prepared with verilog control interface, just depending on the ADC timing diagram of the device can modify the code to run.
ADC0809
- ADC0809为8位AD,程序为利用FPGA实现ADC0809对于信号的模数转换。-ADC0809 8-bit AD, procedures for the use of FPGA implementation ADC0809 analog to digital conversion for the signal.
source_file
- 图像传感器数字控制模块,verilog编写,内涵ADC接口,FPGA验证通过。-image sensor digital controller module
ADCcaiyang
- 用Verilog HDL实现ADC采样。-Stepper motor control using Verilog HDL. Can the intelligent control speed.
Cont_THS1207
- FPGA控制THS1207多通道ADC的verilog源代码-FPGA control THS1207 multi-channel ADC' s verilog source code
01_MODEL_FIXED
- FPGA控制时钟以及数据的传输相位调节,可以很方便地进行ADC等高速接口的动态相位调整;(FPGA control clock and data transmission phase adjustment, can be easily carried out ADC and other high-speed interface dynamic phase adjustment;)
cdce_72010
- cdce72010 verilog code
ADS8329
- ADC芯片ADS8329数据采集的verilog代码,已经用在工程中,没问题。(ADC chip ADS8329 data acquisition Verilog code, has been used in the project, no problem.)
get_data
- 通过使用线性序列机用来对ADC进行设定,此程序比较适合使用Verilog的初学者。非常简洁明了。(By using linear sequence machine to set the ADC, this program is more suitable for beginners using Verilog. Very concise and clear.)
用verilog编写的sigma-delta adc例子
- 累加器实现艾哈空间哈卡哈尽快啊哈卡哈卡快捷回复哈哈哈看(Accumulator implementation)
ad7606
- AD7606采集代码,用于verilog 驱动 AD7606 adc SPI 串口方式(AD7606 acquisition code, used for Verilog drive AD7606 ADC SPI serial mode)
adc
- 使用verilog 硬件描述语言编写的ad采样模块,希望对大家有用。(Using Verilog hardware descr iption language written in AD sampling module, I hope useful for everyone)
ADC0804
- 控制ADC0804的verilog 代码,cpld/fpga都可以使用,用数码管显示ADC采集的二进制数据。(Control ADC0804 verilog code, cpld / fpga can be used to display the ADC digital tube with the binary data collected.)
XADC
- xilinx verilog FPGA驱动AD9613 数据采集DEMO程序(Xilinx Verilog FPGA drives AD9613 data acquisition DEMO program.)
test_ADC
- verilog 数模转换程序,包括AD与DA,AD能够对于波形的数值进行输出,使用的是ego1开发板(transition of A/D signal)