搜索资源列表
aes_crypto_core_latest.tar
- Consecutive AES core Descr iption of project.. Features - AES encoder - 128/192/256 bit - AES decoder - 128/192/256 bit Status - Key Expansion added - Encoder added - Decoder added - Documentation added
khalil2006_true_random_number_generator
- a true random number generator (TRNG) in hardware which is targeted for FPGA-based crypto embedded systems. All crypto protocols require the generation and use of secret values that must be unknown to attackers.Random number generators (RNG) are requ
mini_aes_latest[1].tar
- AES 加解密 代码, 有文档说明，testbench-AES encoding decoding source code in HDL
platforms
- A Pipelined Implementation of AES for Altera FPGA platforms.doc
aesencryption
- Aes encryption on Fpga
AESsim
- AES alogrithm security encryption
aes128
- AES实现的效率如面积、吞吐量和功耗等，主要是由列混合变换和S 盒的实现决定的。S 盒单元的实现成为设 计的重点，它的硬件实现在很大程度上决定着整个芯片的面积大小。 -AES to achieve efficiency, such as area, throughput and power consumption, mainly by the S box column mixing transformation and the realization of decision. S box
systemcaes_latest.tar
- 高级加密标准aes加密算法用fpga实现的Verilog源代码。-Advanced encryption standard aes encryption algorithm using fpga implementation Verilog source code.
aes_crypto_core_latest.tar
- verilog code for aes
AES_package
- aes package ...for yhdl compiles on xilinks we-aes package ...for yhdl compiles on xilinks well
fifo_template
- aes code with fifo control to memory
aes
- Matlab code to simulation the wireless channel type.This is the most common case called Rayleigh channel.And in the frequency selective channel.
aes_thesis_v1.0
- AES VERILOG CODE 128 192 32DES比較-AES VERILOG CODE 128 192 32DES Comparison
AES_verilog
- AES 128bit数据,128bit密钥加解密的verilog语言实现-AES 128bit data, 128bit key encryption and decryption of the verilog language implementation
LIP1611CORE_AES128_SEC_UWB
- AES 128 Synthesisable RTL code
aes_decrypt
- This the Top Module for AES Decryption algorithm-This is the Top Module for AES Decryption algorithm
test_dec1
- This Module creates the test Bench for AES Decryption Algorithm
FPGA_128_AES_decryption
- 以FPGA具體實現的128-bit AES decryption，包括介紹文件以及源碼。-FPGA-based 128-bit AES decryption
Encryption
- AES implementation in VHDL!! Wit LCD controls-AES implementation in VHDL!! Wit LCD controls!!
decryption
- AES decryption in VHDL!! Wit LCD controls