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cpu
- 精简指令cpu,用verilog编写,详细的教程
cpu
- Verilog实现的CPU程序,简单应用哈
CPU
- 使用verilog作为CPU设计语言实现单数据通路五级流水线的CPU。具有32个通用寄存器、一个程序计数器PC、一个标志寄存器FLAG,一个堆栈寄存器STACK。存储器寻址粒度为字节。数据存储以32位字对准。采用32位定长指令格式,采用Load/Store结构,ALU指令采用三地址格式。支持有符号和无符号整数加、减、乘、除运算,并支持浮点数加、减、乘、除四种运算,支持与、或、异或、非4种逻辑运算,支持逻辑左移、逻辑右移、算术右移、循环右移4种移位运算,支持Load/Store操作,支持地址/立即
CPU
- 以前在学校里的课程设计,使用verilog编写的一个CPU程序,可以下板子
MIIPS CPU VHDL源代码
- 该文件是一个较简单的MIIPS CPU的Verilog 源代码
cpu
- cpu design in verilog
cpu
- 一个简单的CPU设计,支持add,sub,mvi,mv四条指令,用Verilog语言编写,在Quratus II上编译通过,仿真正确。-A simple CPU design, support add, sub, mvi, mv four instructions, with the Verilog language, compiled by the Quratus II, the simulation is correct.
cpu
- 用verilog实现的一个32位RISC处理器,能够实现简单的移位、加法等基本操作。-Verilog implementation with a 32-bit RISC processor to achieve a simple shift, addition and other basic operations.
RISC_cpu
- 基于RISC结构的8位微处理器的verilog源代码,很好的东西。-8-bit RISC-based microprocessor architecture verilog source code, a good thing.
multi-CPU
- Verilog开发的能下载到FPGA实验板上运行的多周期CPU-Verilog can be downloaded to the FPGA development board running experiments multi-cycle CPU
8-bit-CPU
- This is a simple 8-bit CPU verilog source code,which includes user s guide.
8051-master
- 设计兼容51的指令集的处理器架构 编写兼容51处理器的Verilog代码 仿真 验证测试处理器的功能和性能(The design includes a processor whose instruction set is compatible to the industrial standard 8051 and its FPGA implementation. Through the analysis of instructions, I determine the CPU inte
mips-cpu-master
- MIPS Implementation in Verilog. Full source code!
Verilog HDL使用中该注意的问题及一些模块代码
- cpu仿真,提供vivado上的cpu仿真生成文件(cpu simulated,but no one can get 20 words in this short file how can I do? just tell you the simulated file and vivado system is 2015)
CPU-Pipeline
- 五级流水线的CPU的工程文件,在vivado上用verilog语言实现,包括串口,可进行简单的数学加法运算。(Five-stage pipeline CPU project files, including the serial port. vivado Verilog language. This CPU can do simple mathematical addition.)
Code
- 提供了《自己动手写CPU》本书每一章涉及的OpenMIPS源代码、测试程序。(It provides the OpenMIPS source code and test program in each chapter, which is written in the book "do it yourself CPU".)
实验九 计算机核心(CPU+RAM)的设计与实现
- 计算机组成原理的CPU实验,基于quartus平台(CPU experiment of computer organization principle, based on quartus platform)
mips-cpu-master
- CPU设计,已通过模拟,有需要的自行下载吧(CPU design has been simulated)
实验一多路选择器与CPU辅助模块设计
- 实验一多路选择器与CPU 模块设计 实验方法与答案(Solutions for computer experiment.)
单周期CPU大作业-2020
- Verilog projects cpu