搜索资源列表
dds_quicklogic
- 高手写的VHDL源码，实现DDS跳频器功能 请大家多提意见-experts write VHDL source code, the frequency-hopping DDS functionality Please speak up
ddsmatlab
- dds在dspbuilder下产生VHDL源码及其测试激励文件的matlab模型,在modelsim下仿真通过-dds dspbuilder under the VHDL source code and test incentives document matl ab model, the simulation under through modelsim
GetRomData
- 生成4种方式的DDS输出的读表程序的VHDL源代码程序。-four ways generation of DDS output of the meter reading procedures VHDL source code procedures.
EXPT12_10_PHAS_PLL1
- VHDL 实现DDS的数字移相信号发生器的设计代码.直接解压打开就可以运行..自己写的代码-VHDL shifter DDS signal generator design code. Directly extract can run on open .. write their own code
DDSsingal
- 三相直接数字频率合成器dds的VHDL源码，希望对大家有帮助-three-phase direct digital frequency synthesizers dds VHDL source code, we hope to help
EDA.rar
- 这里边有EDA设计常用模块的源代码，FFT,DDS PS2_keyboard，VGA等，有学FPGA的就参考一下吧,Here the design of commonly used modules have EDA source code, FFT, DDS PS2_keyboard, VGA and so on, have places on the FPGA reference yourself
dds
- 本程序代码为DDS的程序代码。采用VHDL语言设计。可以直接仿真实现，-The program code of the program code for the DDS. Design using VHDL language. Simulation can be achieved,
EP1C3_12_10_PHAS
- 基于FPGA的移相式DDS正弦信号发生器的VHDL源代码，压缩包里是在Quartus里做的工程，FPGA用的是Cyclone1C3系列-FPGA-based phase-shifting of the DDS signal generator sine VHDL source code, compressed in the bag is done in Quartus Engineering, FPGA is used Cyclone1C3 Series
rom
- 该源码是基于查找表的VHDL代码实现DDS-The source code is based on the VHDL code look-up table DDS
vhdl-ad9910
- ad9910 DDS板 VHDL源代码，在Cyclone II FPGA上调试通过，主要文件说明： Filename Function ----------------------------------------------------- dds_controller.vhd top entity, opcode decoding ddslib.vhd configuration,opcode definition dds_serial.vhd parallel to s
DDS
- 利用现场可编程逻辑门阵列FPGA实现直接数字频率合成（DDS）的原理，以及以DDS为核心的信号发生器。探讨DDS技术在FPGA中 的实现方法，提出采用ALTERA公司的FLEX系列FPGA芯片FLEX10K进行直接数字频率合成的VHDL源程序。-The use of field-programmable gate array FPGA to realize the principle of the direct digital frequency synthesis (DDS) DDS as t
dds
- 是vhdl语言写的dds的部分代码，留下来，方便以后查看-The vhdl language written dds part of the code , to stay , convenient View
dds
- 可以完成直接频率合成器功能的VHDL代码-VHDL code which can complete the function of Direct frequency synthesizer.
dds
- vhdl代码。高精度dds，精度可以达到1hz。不需要多个时钟。-vhdl code. High precision the dds, accuracy can be reached 1hz. Does not require more than one clock.
DDS
- 基于DDS原理，利用VHDL语言进行正弦波、三角波、锯齿波、矩形波等波形的发生。包括完整代码和QUARTUS II工程。-Based on DDS principle, the use of VHDL, sine, triangle, sawtooth, square wave waveform occurs. Including the complete code and QUARTUS II project.
delay
- VHDL代码，源用与两路DDS之间的相位差，现可用于产生相位差可编程的1m时钟，精度可精确到0.01分。输出两路时钟，带起始控制位-VHDL code, source with the phase difference between the two DDS, can now be used to produce 1m phase programmable clock accuracy can be accurate to 0.01 points. Output two clocks with
DDS
- FPGA,ISE12.2,DDS代码，VHDL语言-FPGA, ISE12.2, DDS the code, VHDL language
DDS-VHDL
- 数字频率计DDS的VHDL代码，有很详细的注释-the source code of DDS in VHDL
dds_clk
- VHDL代码实现FPGA中DDS功能，输出频率可调-VHDL code for the FPGA DDS function, the output frequency is adjustable
src
- 初始化DDS模块，使能正线性扫频，参数化设置(DDS code VHDL parameter setting)