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F35RUNFILE
- 该程序在ALTERA FPGA 上搭建NIOS系统，把程序保存在外置的NOR FLASH中并实现开机运行-The program is built on ALTERA FPGA NIOS system, the program stored in the external NOR FLASH and implemented in switched
DE2_NET
- altera DE2开发板和网络通信的例程，使用了nios ii系统-altera DE2 development board and network communication routines, using nios ii system
yinpinxinhaofenxiyi1233412
- 基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核的基于FFT的音频信号分析仪-Based on Altera Cyclone II series FPGA embedded high-performance embedded IP core (Nios) soft core processor FFT-based audio signal analyzer
IrDA
- DE2开发板所付实例，红外无线通信IP核，嵌入式IP核。-altera nios II
VGA
- VGA video controller for the Altera Nios II Processor v4.0
Md5Sopc
- 在Altera平台上实现Md5算法的IP核 modelsim进行MD5硬件代码的仿真和测试 quartusII 和nios软件实现ip核和驱动程序 已经测试程序的仿真和测试 代码调试通过 -Md5 algorithm simulation and test implementation in the Altera IP core platform modelsim the MD5 code simulation and test hardware and quartusII ip nios so
auto_baud_with_tracking
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，自动band跟踪小程序-Altera NIOS processor experiments QUARTUS using VHDL compiler into processors, automatic tracking small band procedure
bcd_to_binary
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，bcd码转bin-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, code switch bin bcd
binary_to_bcd
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，bin转bcd-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, bin turn bcd
H891
- 基于ALTERA的NIOS系统的车载显示系统(车载摄像头和TFT显示器)设计源代码-Car ALTERA NIOS system based display system (car camera and TFT display) design source code
DE2_NET
- Altera的DE2开发板上关于DM9000A的Demo，做好的IP核，在Nios II下运行-Altera s DE2 development board Demo about DM9000A, include IP core, and running under Nios II
memoire_alphabet
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器。实现memory存储。-Altera NIOS processor experiments QUARTUS using VHDL compiler into processors. Achieving memory storage.
reg_8_io_clrset
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，reg的io口软件-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, the io I reg software
sls_sram_16_bit
- altera NIOS软核系统中构建外接SRAM接口的例子-altera NIOS soft-core system to build external SRAM interface example
software-radio-based-on-SOPC
- 介绍了软件无线电的概念和结构， 针对传统软件无线电实现方案， 提出一种基于SOPC 技术的中频软件无线电解决方案。系统采用基于Nios II 软核处理器的SOPC 技术， 在ALTERA 公司 的FPGA 上实现了片上系统。基于SOPC 技术的软件无线电系统具有极高的灵活性、可扩展性，这充分 体现了软件无线电的设计思想。-Describes the software radio concept and structure of traditional software radio i
uart_rxd
- altera 中基于NIOS软核系统的串口接收通信程序-altera-based NIOS soft-core system to receive serial communication program
uart_txd
- altera 中基于NIOS软核系统的串口发送通信程序-altera-based NIOS soft-core system to send the serial communication program
auto_baud_with_tracking
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，自动band跟踪小程序-Altera NIOS processor experiments QUARTUS using VHDL compiler into processors, automatic tracking small band procedure
bcd_to_binary
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，bcd码转bin-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, code switch bin bcd
binary_to_bcd
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，bin转bcd-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, bin turn bcd