搜索资源列表
Nios2_H264-AVC_DEC.rar
- 在Altera开发环境下采用Nios II和硬件加速实现H.264解码的系统方案,The solution uses the Nios II development environment and hardware accelerate to implement H.264 decoding under Altera platform
Qsys_nios2
- 本教程使用最新的Quartus 11.0sp1+Nios 11.0sp1开发工具。在最新的Quartus II软件中，使用了全新的Qsys进行SOPC系统的构建。 较之以前版本使用SOPC Builder构建有了很大的不同。 本教程为Altera最新的官方Tutorial。 一步步教你使用Qsys构建Nios II系统，并使用Nios II SBT开发应用程序。-This tutorial uses the latest Quartus 11.0sp1+ Nios 11.0sp1 d
CLOCK
- 文通过ALTERA公司的quartus II软件，用Verilog HDL语言完成多功能数字钟的设计。主要完成的功能为：计时功能，24小时制计时显示；通过七段数码管动态显示时间；校时设置功能，可分别设置时、分、秒；跑表的启动、停止 、保持显示和清除。-Through the ALTERA company quartus II software, using Verilog HDL language to complete the design of multi-function digital
DE2_EP2C35
- EP2C35开发板官方原理图,是altera的官方资料。是fpga电路设计的很好参考典范。-EP2C35 official development board schematics, is altera of official information. Fpga circuit design is a good reference model.
c2h_fft_cyclone_ii
- 关于用c2h实现fft算法的源代码和说明书 altera-On C2H achieve fft algorithm using the source code and a detailed descr iption of altera
Altera_DE1_Training_Courses_Multimedia_Platform.zi
- Altera DE1 多媒体平台训练课程 视频教程-Altera DE1 training courses multimedia platform Video tutorial
fpga
- 包含5款ALTERA FPGA开发板原理图合集.包含:Cyclone1C20的Nios开发板Cyclone_II_EP2C20_原理图 EP1C3T144 EPM1270F256C5-Contains 5 ALTERA FPGA development board schematics collection. Include: Cyclone1C20 the Nios development board schematics EP1C3T144 EPM1270F256C5 Cyclone
uart_rxd
- altera 中基于NIOS软核系统的串口接收通信程序-altera-based NIOS soft-core system to receive serial communication program
uart_txd
- altera 中基于NIOS软核系统的串口发送通信程序-altera-based NIOS soft-core system to send the serial communication program
AN532_PCIe_sopc_s2gx_x4
- 基于S2gx芯片的NIOS下的x4模式PCI-Express模块-NIOS based S2gx chips x4 mode under the PCI-Express Module
flash_controller
- Altera下的FPGA运行Nios处理器的flash控制器-Altera
my_first_nios2_software_tutorial
- quick start altera NIOS2 programming
Cyclone1C20Nios
- ALTERA Cyclone1C20 Nios开发板，protel99格式-ALTERA Cyclone1C20 Nios，protel99
tut_DE2_sdram_vhdl
- This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
MTDB_SYSTEM_CD_V1.0
- ALTERA Nios II Embedded Evaluation Kit开发板制造商(terasic)提供的多媒体显示板（Terasic Multimedia Touch Panel Daughter Board (MTDB)）扩展开发包。 里为有两个开源的例子 1.MTDB_SD_Card_Audio,从SD卡中读取WAV文件然后通过DA播放，这个对不SD Card的初学者非常的有用，可以知道使用FPGA SPI来读写SD CARD。 2.MTDB_Systhesiz
DE2_NIOS_DEVICE_LED
- Altera FPGA 上利用nios嵌入式处理器实现USB的通信控制-Altera FPGA embedded processor nios use USB communication to achieve control
UART_DMA
- 基于ALTERA公司的NIOSII的串口通信DMA传输设计-NIOSII based on ALTERA s DMA transfer of the serial communication design
niox
- Open source and clean clone of Altera NIOS-II Soft Processor. Not completed but some test do run ok.
Lab2a
- C Code for a Nios II to switch led on a board with an FPGA ALTERA