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hello_world_small
- 采用altera mac核加88e111物理层芯片的千兆网方案，该文件是配置mac层和物理层的nios文件，基于hello world small工程。-88e111 by altera mac core and Gigabit Ethernet physical layer chip of the program, the file is configured mac layer and physical layer nios file, based on hello world small
Profiling_Nios_II_Systems
- Altera公司原版设计手册，nios ii ide profiling模式使用。-This application note describes a variety of ways to measure the performance of a Nios® II system with three tools: the GNU profiler, called nios2-elf-gprof, the timestamp interval timer component,
Nios_Embedded_Processor
- Altera公司原版设计手册，关于嵌入式nios ii 处理器-This manual provides comprehensive information about the Altera® Nios® 32-bit CPU. The terms Nios processor or Nios embedded processor are used when referring to the Altera soft core microprocessor in a
jtag-ceshi
- Altera jtag nios测试源代码值得一看，欢迎大家下载-Altera jtag nios test source code worth a visit, welcome you to download
demo32_32bit
- 基于ALTERA的NIOS系统的车载显示系统-ALTERA NIOS system based on the vehicle display system
nios_dds
- 采用Altera的NIOS内核，配合独立的累加器，实现了正弦波，三角波，锯齿波和方波的DDS产生电路，系统时钟最高可达120MHz，配合高速DAC，可产生最高约40MHz左右的波形-Using Altera' s NIOS core, with a separate accumulator, to achieve a sine wave, triangle wave, sawtooth and square wave generation circuit DDS system clock
CORDIC_FPGA
- 摘要：本文在传统CORDIC算法的基础之上，通过增加迭代次数，对参数进行了优化筛选， 提高了运算精度，使设计出的软核能够在精度要求较高的场合中运行，如实时语音、图 像信号处理、滤波技术等。输出数据经过IEEE-754标准化处理，能够直接兼容大多数处 理器，扩展了其应用范围。最终在Altera公司NiosⅡ处理器中通过增加自定义指令的方 式完成了硬件实现。 关键字：CORDIC ,自定义指令, IEEE-754标准化处理。-Abstract: In this paper, ba
BmpDecoder
- 适用于Altera FPGA Nios II平台uClinux OpenCV之BmpDecoder的源码-Souce code of BmpDecoder for Altera FPGA Nios II uClinux OpenCV
music
- 以vhdl 語言利用nios編寫的音樂控制範例.altera de2板實測可用-Vhdl language used to write the music control nios sample. Altera de2 board can be measured
hello_world_multi
- altera NiosII multicores hello_world_multi.c-altera nios ii
seg_7
- Altera DE系列开发板都可以参考的基于Nios ii 的数码管控制显示0-f程序-display 0-f with 7-segment display on Altera DE series board.
downstream_pipeline
- Altera NIOS II 软核的downstreampipeline-downstreampipeline in NIOS II
CFI_FLASH
- Altera NIOS IICFI 驱动-cfi driver in NIOS II
vehicle-mounted-display-system
- 倒车影像系统FPGA设计，基于ALTERA的NIOS系统的车载显示系统(车载摄像头和TFT显示器)设计源代码，集成仿真环境QUARTUS II7.0及NIOS 7.0,高等级版本可兼容-Reversing video system FPGA design, based on ALTERA NIOS system of vehicle display system (Car Camera and TFT displays) design source code, integrated simula
usb
- altera FPGA NIOS架构，实现USB的读写操作-altera FPGA NIOS
mc8051_cyclone_nios
- mc8051 v1.4 oregano VHDL core for the Altera Cyclone Nios evaluation board.
Introduction_to_the_Altera_SOPC_Builder
- This file contains basics information how to use Altera and NIOS II processor
DE2StandardCore
- ALTERA DE2 开发板的最小NIOS系统-ALTERA DE2 BOARD MINI NIOS
DE2_115_SD_CARD
- altera 官方开发板DE2的SD卡源码，里面有详细的nios平台下的FAT32文件格式，并可以对SD操作-source of altera official development board DE2 for SD card , there are detailed FAT32 file format and read-write to SD on the nios platform
SOPC_LED
- 基于Altera公司的Nios软核的LED程序。简单的SOPC例程。-SOPC(System on a Programmbale Chip) application based on the Nios Core which produced by Altera Cor.