搜索资源列表
PCI_144
- -- PCI Target Interface Design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library --- PCI Target Interface Design for XC73144 -- -- Synopsys VHDL Solution using Xilinx XC7000 Library
PCIarbitration
- 这是PCI 仲裁机制的VHDL源码，它实现了PCI仲裁机制。-PCI arbitration mechanism VHDL source code, it achieved a PCI arbitration mechanism.
PCI_VHDL
- vhdl实现pci，找了很久才下到。应该比较适合设计-vhdl implementation pci, looking for a long time before the next to. Should be more suitable for design
PCI_express_layers
- PCI express layers doccuments
This_is_pci-wishbone_nuclear_and_16450_serial_port
- 这是用pci-wishbone核和16450串口核在xilinx的FPGA上实现的。-This is pci-wishbone nuclear and 16450 serial port on the nucleus in xilinx FPGA-implemented.
PCI9052
- 用verilog语言编译的pci协议实现，而且有具体的电路图-Compiled with the verilog language pci protocol implementation, but also the specific circuit
105230299PCI-IPcoreor1k[1]
- nios connection with bus avalon
FPGAPCI
- 本资料是永远FPGA的PCI接口代码，vhdl写的，已经通过仿真认真。-this is a good ziliao about pci。
testbench
- altera 最新的CYCLONE IV的pci-e核的testbench，VHDL源程序。-altera latest CYCLONE IV of the pci-e core testbench, VHDL source code.
pic8255
- PCI 8255 VHDL 源代码，主要含有主模块以及部分副模块-PCI 8255 VHDL CODE
pci9054
- PCI读写控制程序 PCI9054与SRAM连接-PCI9054 PCI read and write control procedures connected with the SRAM
Xilinx_PCIE_DMA
- Xilinx芯片所有关于PCI Express接口的DMA源代码，包含相关的配套的文档资料。-Xilinx chip on the PCI Express interface for all DMA source code, including relevant supporting documentation.
PCI_T32
- PCI-32转local bus-PCI-32 switch to local bus!!!!!!!!!!!!!!!!!!!!!!!
VHDL
- 基于V6的pci-express 总线实现-Based on the pci-express bus V6 achieve
VHDL
- 基于downstreamsim的pci-exress仿真-Based on the pci-exress simulation downstreamsim
ADSP2011Local
- pci9054芯片本地总线控制示例程序，可用于pci驱动和应用程序的测试。每隔一段时间产生一次中断，产生1，2，3等递增数据，配合pci9054驱动和应用程序完成数据传输 2.说明：文件夹内是Quartus 9.0的工程文件，使用Verilog语言。-pci9054 local bus control chip sample program can be used for pci driver and application testing. Generate an interrupt at r
vhdl
- 这个程序是fpga的pci通讯程序，可以通过pci控制fpga-This program is the fpga pci communications program, you can control via pci fpga
vhdl
- 32位33Mhz PCI接口程序设计参考，芯片是Lattice -32-bit 33Mhz PCI interface programming reference chip is Lattice
MYPCI
- PCI VHDL程序，根据PCI通信协议编写的，，，没有用IP核，。。。本人接触PCI不久，次代码可能会存在些问题，请各位高手指点指点，小弟不尽感激-PCI VHDL procedures, according to the PCI communication protocols written, without using IP cores. . . I contact PCI soon, there may be some minor code issues, please master g
pci
- VHDL编写的pci接口程序，为项目的接口部分，可直接使用。-pci interface source code writing by VHDL.