搜索资源列表
pocp
- 简单的i/O接口的vhdl设计，包括工程，源码，仿真波形，为POC型的接口-Simple i/O interface of the VHDL design, including engineering, source code, simulation waveforms, for the POC-based interface
POCPexperiment
- vhdl课程设计的POC程序，功能完整可直接执行，最终评为优秀-vhdl program designed POC program, full-featured to-run, and ultimately as good
POC
- 用VHDL语言设计一个并行输出控制器POC，作为系统总线个打印机的借口-The purpose of this project is to design and simulate a parallel output controller(poc) which acts an interface between system bus and printer. The Altera’s Maxplus II EDA tool is recommended and provided for simul
Test_POC
- 东南大学VHDL课程POC设计 Verilog语言-Southeast University VHDL course POC designed the by Verilog language
My_POC
- Simulating the functions of POC.(Simulating the functions of POC. In VHDL, with ISE.)