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CPLD_SPI
- 单片机通过SPI接口与FPGA进行通信的VHDL代码，程序实际可用的-Microcontroller through the SPI interface to communicate with the FPGA, a very common
spi_master
- 用VHDL编写的一个SPI主机程序，SPI模块采用最常用的模式0方式（即CPOL=0,CPHA=0）通信。文件内含测试文档，已在Modelsim6.5上测试通过，可在FPGA上直接调用。-A SPI Master code edited by VHDL language,the SPI modul use 0 MODE(i.e CPOL=0,CPHA=0)to communicate with the SPI Slave.and there is a testbench in the file
DACtest
- Spartan 3E - DAC- VHDL. It is a vhdl code for Xilinx Spartan 3E fpga to run ADC and AMP on the board via SPI interface.
tCUSS_SPI-VHHh
- 此为VHDL的SPI通信代码，全部部在一个压缩包中，请仔细阅读后再使用． -This is the VHDL SPI communication code, all the Ministry in a compressed package, please read carefully before use.
xapp386
- This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in a Xilinx® CoolRunner™ -II CPLD. CoolRunner-II CPLDs are the lowest power CPLDs available, making this the perfect target device for an SPI Mas
xapp348
- This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in a Xilinx CoolRunner™ XPLA3 CPLD.-This document details the VHDL implementation of a Serial Peripheral Interface (SPI) master in a Xilinx CoolRunne
quartus-file
- 利用VHDL编写SPI传输与接收协议，发送单字节信息，状态机思想-Use VHDL to write SPI transmission and receiving protocol, send a single-byte information, the state machine
SPI_verlog
- VHDL 语言实现的串转并 SPI 等等 实现-The SPI bus is a 3 wire bus that in effect links a serial shift-- register between the master and the slave . Typically both the-- master and slave have an 8 bit shift register so the combined-- register is 16 bits. Whe
AD9511_spi
- 该代码为VHDL语言描述的AD7738 SPI通讯程序，包含一些重要注解-Thisis a serial communication promgram of AD9511 designed with VHDL which compared with some intercription.
AD9258_spi
- 该代码为VHDL语言描述的AD9258 SPI通讯程序，包含一些重要注解-This is a serial communication promgram of AD7738 designed with VHDL which compared with some discr iptions.
AD5791_spi
- 该代码为VHDL语言描述的AD579 SPI通讯程序，包括一些代码注解。-Thisis a SPI communication promgram of AD5791 designed with VHDL which compared with some discreption.
Read_SPI_ADC
- This VHDL code takes a clock, reset, Capture_EN and SPI data LT2315 ADC and generates SPI_CLK and SPI_nCS of it and reads 12-bit serial data ADC and returns 12-bit parallel data.-This VHDL code takes a clock, reset, Capture_EN and SPI data LT2315 AD
simple_spi_latest.tar
- 基于vhdl的spi主从模式的程序，实现简单的SPI收发，对于实际使用学习是个比较好的例子！-VHDL SPI master-slave mode based on the procedures, the realization of a simple SPI transceiver for practical use, is a good example of learning!