搜索资源列表
71V416_Verilog_95461.rar
- SRAM IDT71V416的VerilogHDL仿真模型源码文件,SRAM IDT71V416 simulation model of the source document VerilogHDL
cy7c1371c_vhdl_10.zip
- cy7c1371c ZBT SRAM 的仿真模型，VHDL编写。,the simulate model of cy7c1371c,VHDL language.
STC_2uart-sram.rar
- STC单片机双串口测试程序，用于调试STC单片机的双串口,STC microcontroller pairs of serial testing program for debugging serial port pairs SCM STC
DE2_70_LTM_CCD.zip
- A design on a DE270 FPGA with the use of CCD: a camera DC2 and a TRDB LTM after reading from the SRAM. ,A design on a DE270 FPGA with the use of CCD: a camera DC2 and a TRDB LTM after reading from the SRAM.
ISSI-SRAM
- 诸如UT62256,GM76C256,IS61LV5128等SRAM芯片，基本上他们的时序操作大同小异，在这里总结一些它们共性的东西，也提一些简单的快速操作SRAM的技巧。-UT62256, such as an SRAM chips, GM76C256 IS61LV5128 etc, they are the same, the timing operation here summarized some things in common, they have also mentioned so
SRAM
- VerilogHDL语言读写SRAM内部数据。SRAM芯片型号为61WV102416ALL，即1024K字，每字16位，共16Mb。工作在100MHz频率下。-VerilogHDL language to read and write internal data SRAM. SRAM chip model 61WV102416ALL, ie 1024K words, each word 16, a total of 16Mb. Work in the 100MHz frequency.
SRAM--verilogsram
- 在quatus2环境下编写的SRAM读写实验,verilog代码-Environment written in quatus2 SRAM read and write test, verilog code
SRAM
- stm32f103zet6,通过stm32的fsmc来对sram的控制，实现数据读写-stm32f103zet6, through stm32 of fsmc to the control of sram, read and write data
Verilog_SRAM.rar
- 使用Verilog写的SRAM的控制程序，仅供参考！,The use of the SRAM write Verilog the control procedures, for reference purposes only!
sram
- sram操作vhdl源程序，内有sdram模型，控制器设计，及测试源程序-sram operating in vhdl \doc DDR SDRAM reference design documentation \model Contains the vhdl SDRAM model \route Contains the Quartus 2000.05 project files a routed controller design \simulation
FIFO
- verilog编写的读写fifo的源码，包括sram的读写控制-verilog source code written to read and write fifo, including the sram to read and write control
LM3SLib_GPIO_Parallel-Bus
- LM3S系列ARM用GPIO模拟并行总线扩展32KB SRAM PF0～PF7 D0～D7（数据总线） PA0～PA7 A0～A7（地址总线低8位） PB0～PB7 A8～A15（地址总线高8位） PB7 /CE（片选） PC4 /WE（写使能） PC5 /OE（读使能） 32KB SRAM 映射在地址0x0000～0x4FFF之间 为了加快访问速度，软件上将采用寄存器方式进行操作 PB7原为/TRST功能，现在也解放出来作为地址线A15-ARM
SRAM
- sram读写验证，用verilog写成，简单-sram module for test
SRAM_16Bit_512K_0
- SRAM的ip核，niosii，avalon总线的-SRAM' s ip nuclear, niosii, avalon bus
altera_up_avalon_sram
- 基于Avalon的SDRAM控制器IP核-Avalon SRAM Controller
SRAM_Write_read
- SRAM读写的VHDL实验,通过对写入的数据与读出的数据进行比较,判断读写SRAM是否成功-SRAM read and write VHDL experiments on written data and read data to compare, to judge the success of SRAM read and write
EP2C-SOURCE_CODE
- 有關於EP2C的一些程序(EX:I2C,FLASH,IRDA,MUSIC,LED,LIGHT,SRAM,UART,PS2,SPI )-EP2C on some of the procedures (EX: I2C, FLASH, IRDA, MUSIC, LED, LIGHT, SRAM, UART, PS2, SPI)
STC_2uart-sram
- 双串口收发多串口收发，单片机间的通信，实现很多的功能-Dual serial multi-transceiver serial port transceiver, single-chip communication to achieve a lot of features
SRAM
- KEIL开发的基于STM32F407外部扩展内存的实例。外部扩展2M的SRAM，实现了读写功能。代码由微雪开发板测试通过-KEIL development Based on STM32F407 external expansion memory instance. External expansion 2M of SRAM, the read and write capabilities. By the test code by Flurries development board
C51
- 51单片机用c语言实例 包括ad，da，lcd，ICcard，sram，wdt等许多程序-51 Single-chip using c language examples include ad, da, lcd, ICcard, sram, wdt, and many other procedures