搜索资源列表
epcs_controller
- 用verilog 语言写的可配置控制器程序用于实现fpga软件程序的存储-Verilog language used to write programs that can configure the controller fpga software programs used to implement the storage
aescore
- 基于FPGA的AES算法实现的VERILOG源代码，对于信息安全专业研究AES算法的硬件实现很有用-FPGA-based AES algorithm implementation VERILOG source code, for the information security professional research of the hardware implementation of AES algorithm is useful
S1_38yima
- 利用fpga作为控制器让蜂鸣器实现播放音乐-verilog fpga
ARMcore
- 基于FPGA的ARM IP核！该软核VHDL源码全部开放-FPGA-based ARM IP core! The soft core VHDL source code are all open
dds
- 基于FPGA的DDS设计，本程序采用verilog HDL语言编写，使用DDS+Pll倍频-The DDS-based FPGA design, the procedures used verilog HDL language, the use of DDS+ Pll frequency
RS-code
- 我测试过的！Verilog HDL实现RS编码。-I' ve tested it! RS coding Verilog HDL implementation.
UART
- 语言：verilog语言 功能：通过串口控制模块，实现FPGA与串口 通信。 仿真环境：modelsim 综合环境：quartus -Language: verilog language function: through the serial port control module, FPGA and serial communication. Simulation Environment: modelsim integrated environment: quartu
lpc
- LPC总线从设备的verilog设计,包含状态机和中断功能。-verilog code for LPC device
SPI
- 基于FPGA的SPI控制器的设计，有代码和相关文档资料-the design of SPI controlor ,including verilog codes and other documents
uart_EP3C16_FIFO
- Verilog编写的串口RS232收发字符串程序,使用FIFO作为数据缓冲区,有效收发字符串长度为256字节,解决了利用串口调试工具与FPGA通讯只能收发单字节的问题.-Programs for uart/RS232, it can receive and transmit strings.
hdlc
- HDLC接口协议的FPGA实现使用verilog-design of HDLC
DE0_NANO_GSensor
- 该代码利用DE0 nano上面的ADI ADXL345三轴重力传感器实现重力感应，根据偏转角度的不同点亮相应方向上面的LED灯，稍加修改，还能够将各个方向上面的重力加速度值实时显示，希望大家喜欢-The code used DE0 nano gravity above the ADI ADXL345 three-axis accelerometer sensors to achieve according to the deflection angle of light in different
tlc5615
- TLC5615串行DA的驱动接口,采用verilog编程-TLC5615 driver DA serial interface using verilog programming
lcd
- 基于fpga的tft液晶驱动，控制器是ILI9325，是verilog写的，16位并口模式，我上网上搜索了很久都没找到的，-Fpga based on the tft LCD driver, controller ILI9325, is written in verilog, 16-bit parallel mode, on-line search for a long time I did not find,
Chapter6-9
- 第六章到第九章的代码 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例
H.264Decoder
- H.264解码器，用verilog写成，可以在FPGA上实现baseline的264解码-H.264 decoder, written with verilog, can be achieved in the FPGA on the baseline of 264 decoding
fir_lms
- 基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。-FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.
PAL
- PAL_D电视信号VHDL以及verilog源程序！ FPGA设计PAL_D电视信号！VHDL源程序！两个程序都是黑白的video信号，输出可以直接在视频显示器上显示。 -PAL_D TV signal VHDL and Verilog source!
TCL2543
- 基于FPGA的TLC2543控制器,采用状态进行控制ADC进行转换-The TLC2543 controller based on FPGA, using state control of ADC conversion
dds
- 基于FPGA的双路可移相任意波形发生器 Altera中国大学生电子设计文章竞赛获奖作品刊登-FPGA-based dual phase shifter can be arbitrary waveform generator Altera China Undergraduate Electronic Design Contest winning entries published articles