搜索资源列表
CPLD的串口程序(VHDL)
- 在CPLD上实现UART,利用VHDL进行编程。
实现PS/2接口与RS-232接口的数据传输
- 实现PS/2接口与RS-232接口的数据传输, 可以通过RS-232自动传送到主机的串口调试终端上并在数据接收区显示接收到的字符。,The realization of PS/2 port RS-232 interface with data transfer, RS-232 can be automatically sent to the host serial debug terminal and reception area in the data display received ch
uart.zip
- uart串口通信程序,用状态机实现的;测试通过,并且实践过,uart
fpga-dm9000a
- 一个项目工程,硬件包含XINLINX FPGA,配置FLASH,串口,SDRAM,与以太网芯片DM9000A,实现数据采集,以太网传输,电路验证完全正确,请放心使用,SPARTAN 3E 的BGA引脚320个,不容易布板,可以参考使用的。要FPGA实现网络通信也可以参考电路,B因为产品升级了所以公开原来的电路的。 -A project engineering, hardware contains XINLINX FPGA, configuration FLASH, serial port, SD
UART
- 利用FPGA接受232芯片的串口数据,可以与PC进行串口通信-FPGA chip using the serial data received 232, serial communication with PC
uart
- 采用VHDL语言编写的串口驱动程序,已调试通过,能够实现同PC机的数据传输,可读性好,可移植性好-VHDL language using the serial driver has been debugged, to achieve the same PC, the data transmission, readable and portable
DE0_RS232
- Altera公司的多媒体开发板DE0上实现的串口例程-Altera' s multimedia development board to achieve the serial routines DE0
UART
- 自己实用Verilog编写的UART程序,1位开始位,8位数据位,1位停止位,本测试程序配置完管脚后,实用串口大师发送数据,则返回数据为发送数据+1-Verilog prepared their own UART practical procedures to start a bit, 8 data bits, 1 stop bit, the test procedure End pin configuration, the utility serial Master to send data,
UART
- 语言:verilog语言 功能:通过串口控制模块,实现FPGA与串口 通信。 仿真环境:modelsim 综合环境:quartus -Language: verilog language function: through the serial port control module, FPGA and serial communication. Simulation Environment: modelsim integrated environment: quartu
FPGAuartdebug
- FPGA串口界面调试程序,用VHDL语言实现-FPGA serial debugger interface, using VHDL language implementation
CPLD
- ad采集的小模块,实现串口转并口的功能,串口是SPI的接口-ad collector modoudle ad ad ad ad ad da da da da shuzi moni moni shuzi caiji caiji caiji caiji caiji caiji caiji
uart_v
- VHDL串口程序,通过验证,识货的快下载,精品-VHDL serial procedures, validated,识货faster downloads, quality
UART
- 串口实验,很好用,我还有verilog HDL VHDL CPLD EPM1270 源代码-Serial experiments, very good, and I still have the source code verilog HDLVHDL CPLDEPM1270
sclock
- FPGA EP2C5Q288C8 串口原码,测试OK 打开即用.-FPGA EP2C5Q288C8 the original serial code, test that is used to open OK.
SPI-Collect
- 一个spi串口 希望大家能用上 -Spi serial a hope that we can use on
71477212NiosII_uart
- 串口sopc uart实现串口功能,包含帧的开始字节,命令字节-Serial sopc uart serial implementation features, including frame start byte, command byte
DP_RAM_lab
- 用SmartGen 生成一个2k*8 Dual Port RAM,并通过串口发送数据初始化RAM。然后通过串口返回到上位机的串口调试程序显示。-SmartGen generated using a 2k* 8 Dual Port RAM, and sending data through the serial port to initialize RAM. And back through the serial port to the PC serial port debugger displ
xapp345_vhdl
- adc转换功能的vhdl源码,其中包含adc_interface 和转换还包含串口输出-adc tranfer
VHDL
- 可用于FPGA的用VHDL语言写的关于串口通讯的源代码-FPGA can be used in the VHDL language used on the source code for serial communication
uart_controler_0622
- 自己设计的串口数据格式转换模块,转换格式为8位——32位,用户可自行修改。-Design their own serial data format conversion module, the conversion format for 8- 32 spaces, users can modify their own.