搜索资源列表
frqcounter
- 频率计vhdl代码,采用max plus -Frequency counter vhdl code using max plus II
VHDL
- 本程序包换一个游戏程序和各种功能的计数器和加法器源程序及波形发生器的代码程序,适合初学者使用-This program replacement a game program and a variety of functions counters and adders and waveform generator source code procedures, suitable for beginners
LED-VHDL
- 本程序为LED点阵显示的VHDL程序代码,代码注有解释,适合初学者使用-This program is LED dot matrix display VHDL code, the code marked with explanations for beginners
aes_pipe
- 流水线AES加密VHDL代码,代码规范,值得参考- The VHDL code of Pipelined AES encryption
VHDL-code-specification
- vhdl的代码规范。包括命名、语句使用等。注重可移植性以及硬件资源的节约。-vhdl code specifications. Including naming, such statements use. Attention to portability and hardware resource conservation.
vhdl
- NUTAQ 公司的RF 420M 的FMC接口代码 -NUTAQ company' s RF 420M of FMC interface code
USB_BLASTER_code
- 用于制作ALTERA FPGA的下载线(USB_BLASTER)的CPLD逻辑代码(VHDL代码)。-USB BLASTER CODE DDFP SDFA SDE DSF DOD DOE DOE DOIII DEG SDAF, FSGR SE.
LCD1602_cpld_max_vhdl
- LCD1602 完整的MAX2 CPLD VHDL 代码,可以直接使用的-LCD1602 MAX2 CPLD VHDL
CORDIC-Data
- CORDIC的matlab代码和VHDL代码,大牛分享的,自己试用过,非常好-realize CORDIC algorithm through Matlab and VHDL
Three-input-Majority-Voter
- 三人表决器(三种不同的描述方式),VHDL代码-Three-input Majority Voter
ex3
- FPGA控制的电机驱动VHDL代码,可实现正转,反转,启动,停止。并可以实现PWM调速。代码中预留了控制接口,可方便完成上述功能的实现。- The code is for driver based on FPGA. It can realize the function of start, stop, speed adjust.
alu
- 可以实现十六种算术运算和逻辑运算的VHDL代码哦,ISE上编译仿真可以运行-Can achieve sixteen kinds of arithmetic and logic operations of the VHDL code Oh, ISE compiled simulation can be run on
fsm
- 检测连续3个1的状态机的VHDL代码,输入11111则输出00111,ISE可以编译仿真,运行-Detecting consecutive three one state machine VHDL code, enter 11111 Output 00111, ISE can compile simulation run
fpga0
- 哈工大计算机设计与实验的其中一个实验,测试实验仪器用的VHDL代码-HIT computer design and experiment in which an experiment, test laboratory instruments used in VHDL code
lablab2
- 实现四位串入串出的移位寄存器,其实就是四个D触发器相连的VHDL代码,ISE可以运行-Achieve four string into the string out of the shift register, in fact, four D flip-flop connected to the VHDL code, ISE can run
vhdl
- 实现信号发生器的vhdl教学代码,提供了串口的功能和发生波形的功能,-Realization of the signal generator vhdl code for teaching
CPU_project
- CPU设计与实践实验源码,工程文件 ise。VHDL代码 可直接运行-cpu project
blif2vhdl-v1.1
- 将BLIF(Berkeley Logic Interchange Format)格式的电路转换为VHDL代码,使用perl编写,需要perl环境才能使用。 内含BLIF格式的官方说明。-Translate BLIF(Berkeley Logic Interchange Format)circuit to VHDL descr iption, the translator need perl environment to run. Please check you have related t
1111-Sequence-Detection
- 1111序列检测的设计VHDL代码,用状态机实现111序列检测的设计,如果检测到正确的序列,则led灯亮起,否则熄灭-1111 Sequence Detection design VHDL code, using the state machine to achieve 111 Sequence Detection design, if it detects the correct sequence, led lights, otherwise extinguished
chuankou
- 实现FPGA与PC的串口通信,工程文件完整,可直接运行,VHDL代码-FPGA implementation of serial communication with the PC, complete engineering documents, can be directly run, VHDL code