搜索资源列表
vhdl
- cic 滤波器,vhdl代码 ,内插与抽取-cic filter ,vhdl code about decination and interpolation
ISCAS89(vhdl)
- ISCAS89电路的vhdl代码,测试使用-the vhdl code of ISCAS89 circuit for testing
vhdl
- ISCAS89电路的vhdl代码,测试使用-the vhdl code of ISCAS89 circuit for testing
FPGA-VIRTEX5-VHDL
- XILINX Virtex5 关于演化硬件的VHDL代码-XILINX Virtex5
Async-FIFO-VHDL
- 异步FIFO VHDL代码实现,包括:async_fifo_show_ahead.vhd, async_fifo_show_ahead_rd_task_logic.vhd,async_fifo_show_ahead_wr_task_logic.vhd, sync_r2w.vhd,sync_ram_std_dc.vhd,sync_w2r.vhd-The asynchronous FIFO VHDL code implementation, including: async_fi
stopwatch-VHDL
- 自己用VHDL语言写的一个秒表程序,包括秒,分秒和百分秒。有程序说明和VHDL代码,一看就懂-Own use VHDL language used to write a stopwatch program, including the seconds, minutes and seconds and hundredths of a second. There descr iption of the procedures and VHDL code, one can understand
VHDL
- 通信领域里的产生随机PN序列,QPSK调制解调的VHDL代码,适合通信领域的人士使用-Communication in the field of random PN sequence, QPSK modulation and demodulation of the VHDL code, those suitable for use in the field of communications
FIR-VHDL
- 15阶FIR滤波器的设计VHDL代码 ,包括顶层模块及各模块的VHDL设计代码-15 order FIR filter design VHDL code, including the top-level module and each module VHDL design code
FFT-VHDL-source-code
- FFT的FPGA源码VHDL,代码说明在代码文件内有注释。-FPGA FFT VHDL source code
DDS-VHDL
- 数字频率计DDS的VHDL代码,有很详细的注释-the source code of DDS in VHDL
VHDL代码
- 实现简单的电子拔河比赛,即两按键模拟,计数器计数,比较器进行比较,最后通过LED灯进行直观显示(To achieve a simple tug of war competition, that is, two button analog, counter count, comparator comparison, and finally through the LED lamp for visual display)
crc16
- 一个实现CRC16的VHDL代码,以及说明CRC计算的原理和方法。(a VHDL code for CRC16.)
fpga代码
- 实现了m序列产生,同步信号提取功能,实现了所有功能(The m sequence is generated and the synchronous signal extraction function is realized)
基于vhdl的出租车计价器
- 对vhdl的出租车计价器的设计,自己编写的,有详细的解释和说明,论文附有代码(Taximeter on the design of VHDL, written by itself, there are detailed explanations and notes, papers with code)
VHDL交通灯
- 利用VHDL写的交通等程序,代码在文档中,可以实现十字交通灯的各种状态模拟(Using the traffic program written by VHDL, the code can be used to simulate the various states of the cross traffic lights in the document.)
基准电路ISCAS`89
- 基准电路ISCAS`89所有电路的verilog语言以及VHDL代码。(The reference circuit ISCAS`89 is the Verilog language of all the circuits and the VHDL code.)
2_4decoder
- 三种描述风格的VHDL代码,快速建立不同风格描述语言的概念及结构(Three styles of VHDL code to quickly establish the concept and structure of different style descr iption languages)
按键去抖电路VHDL描述
- 在开发板FPGA:Spartan-3E 系列,型号:XC3S500E,封装:FGT320,速度-4,利用Xilinx ISE软件,利用VHDL软件编写按键去抖电路,包含实验说明以及代码实现VHDL.doc文件,UCF管脚绑定文件(In the FPGA:Spartan-3E development board series, XC3S500E, package: FGT320, speed -4, using Xilinx ISE software, write the debounce cir
cpu自制入门代码AZPR_RTL
- CPU自制入门代码..............(CPU DIY ............)
Profibus DP - VHDL BUS Model
- Profibus DP VHDL总线模型设计,包含主站和从站VHDL设计代码和测试代码