搜索资源列表
filter1
- 题为基于CSD编码的FIR数字滤波器设计.该滤波器具有线性相位,系数减半.采用VHDL语言编写.是我们EDA课程的作业,得了优.希望对大家有用-Entitled based on CSD code FIR digital filter design. That the filters have linear phase, coefficient half. Using VHDL language. Is the EDA program operations, got excellent. Hop
FIR_128
- FIR 128阶低通滤波器，由matlab仿真并在quartusII中实现-FIR 128 order low-pass filter
32fir
- 32阶滤波器分布式算法实现的主程序代码,用EP2c35f84c8寄存器速率可达243.55MHz-32-order FIR digital filters: 32 filters distributed algorithm order the main program code, register with EP2c35f84c8 rate up to 243.55MHz
21840263filter-vhdl-code
- 这是我看到的一个关于FIR滤波器的资料，和大家分享。-This is what I see about FIR filter information to share with you.
FPGAdesignandFIRimplementation
- 文档中含有DDS的VHDL实现，FIR滤波器串并FPGA实现，synplify,ISE,ModelSim后仿真流程和FPGA设计的资料-document contains DDS implementation with VHDL , FIR filter serial to parallel and FPGA implementation, and synplify, ISE, ModelSim simulation and FPGA design
fir
- 真正意思上的fir滤波器课程设计，基于quartus II9.0的vhdl代码。有原理图输入和例化元件-The real meaning of the fir filter design program, based on quartus II9.0 the vhdl code. A schematic of components and cases
20FIRfilterwithCSD
- 20阶FIR滤波器，用CSD编码对参数进行了设计-20-order FIR filter with CSD coding of the design parameters
12dac
- 自己编的12位dac 不过需要外接滤波器才可以看得更好些-a 12bit dac need a lpf which can view clearly
fir
- FPGA实现的FIR滤波器，很好的参考资料！-FPGA implementation of FIR filters, a very good reference!
VHDL
- 滤波器 VHDL 应用VHDL基于FPGA设计FIR滤波器-Application of VHDL-based FPGA VHDL filter FIR filter design
da
- FIR滤波器利用串行DA算法实现16阶的，直接可用 ，用VHDL编程-Serial DA FIR filter algorithm using 16 bands, directly available, VHDL programming
iir_filter
- iir滤波器的fpga实现，教你如何用vhdl描述一个iir滤波器-iir filter fpga implementation, teach you how to describe a iir filter vhdl
fir6dlms
- lms算法，自适应滤波器中使用fir滤波器对信号的码间干扰进行均衡-lms
FIR
- 本程序实现了FIR滤波器，使用了全并行的分布式DA算法，附有仿真波形。-FIR filter with DA
CIC_filter
- CIC滤波器的原理及FPGA实现 里面有我收集的各种关于CIC滤波器的FPGA 实现的文章及源码-CIC filter FPGA realization of the principle and there are a variety of my collection on the CIC filter FPGA implementation and the source article
implementation-of-srrc-filter
- 这是基于国标DMB_TH中发端升余弦滚降滤波器中FPGA实现，包括滤波器的理论，DA算法和多相分布算法-This is based on GB DMB_TH the originator Raised Cosine Filter in FPGA, including the filter theory, DA algorithm and multi-phase distribution algorithm
FPGA-FIR
- FIR滤波器，算法，采用VHDL编程语言，算法比较简单，希望对大家有所帮助。-FIR filter algorithm, using VHDL programming language, the algorithm is simple, we want to help.
FIR-lv-bo-code
- 此代码为FIR滤波器的设计源码，并对其代码做了相应的改进，综合仿真结果成功-This code source code for the FIR filter design, and the code does a corresponding improvement, integrated simulation results successfully
cic
- CIC积分梳状滤波器的程序、是生成五级CIC抽取器：cic3_decimator.V-CIC CIC filter program, is to generate five CIC decimator: cic3_decimator.V
cic_interp_8_three
- cic_interp_8_three，是产生三级cic差值滤波器-cic_interp_8_three, the difference is to produce three cic filter