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pinlvji
- 用VHDL语言编写的频率计，在FPGA上使用，已验证，全工程文件-In the frequency of the VHDL language, on the FPGA has been verified, the whole project file
tmx
- LCD1602显示频率计，vhdl语言编写，可移植模块-LCD1602 display frequency meter, the VHDL language, portable module
plj_a
- FPGA经典频率计，使用完整的VHDL语言，有足够的注释，一看就会-FPGA classic frequency plan, use the complete VHDL language, have enough comments, a look at will
Digital-frequency-meter
- 采用VHDL设计的数字频率计系统，测量频率范围在1HZ---10Khz，带有超量程报警和数码管分时扫描电路-VHDL design, digital frequency meter, measuring the frequency range of in 1HZ--- 10Khz, with over-range alarm and digital control of time-sharing scanning circuit
FPGA-based-frequency-counter
- 文章主要介绍了使用VHDL实现数字频率计的功能，其中包含了各部件的VHDL语言描述，仿真和大致硬件框图，对于初学EDA者大有帮助。-The article introduces the VHDL realization of the functionality of the digital frequency meter, which contains the hardware block diagram of the various components of the VHDL languag
FBASSED_FLEX1L
- 一种基于FLEX10K的频率计设计，使用分层设计，顶层文件为为GDF，其余为VHDL代码，有一定的参考价值。 已通过测试。 -Based FLEX10K frequency meter design, using a layered design, top-level document GDF rest VHDL code, there is a certain reference value. Has passed the test.
freq
- vhdl八位十进制数字频率计的设计，顶层和数码管扫描模块-vhdl eight decimal digital frequency meter design, top-level and digital tube scanning module
12decimal-digit-frequency-design
- 主要实现12位十进制数字频率计的设计，WORD里面包括具体的流程图和VHDL相对应的程序还有仿真结果-12 decimal digit frequency meter design major, WORD which includes the program as well as simulation results corresponding to the specific flow chart and VHDL
Frequency8bit-OK
- 8位频率计 CPLD VHDL EMP570 ALTERA-Frequency8bit CPLD VHDL EMP570 ALTERA
freq_counter
- vhdl编写的数字频率计,可用三个频段选择，Quartus II 8.1上测试通过-the frequence counter by VHDL，compiled by Quartus II
FPGApinlvj
- 基于FPGA的频率计程序，是用VHDL语言编写的，通俗易懂。-FPGA-based frequency meter program
pin-lv-ji
- 基于vhdl的频率计源代码，分层设计，代码可以直接运行-Vhdl frequency meter source code, hierarchical design, code can be run directly
shu-zi-pin-lv-ji
- 基于vhdl的数字频率计设计方案，代码完整可以直接运行，实验报告完整版-Vhdl digital frequency meter design, code integrity can be run directly to the full version of the lab report
edashuzipinlvji
- EDA/VHDL数字频率计，可编程逻辑门阵列，EDA课程设计-EDA/VHDL digital frequency meter, programmable logic gate array, EDA curriculum design
COUNT
- vhdl编写的数字频率计，可以实现对输入波的频率计数-vhdl prepared by of the digital frequency meter
frqcounter
- 频率计vhdl代码，采用max plus -Frequency counter vhdl code using max plus II
Fmeter
- 基于FPGA的VHDL程序，实现双精度频率计功能，包括频率计数、测量占空比等-FPGA-based VHDL procedures to achieve double-precision frequency meter functions, including frequency counting, measuring duty cycle, etc.
Digital-frequency-meter
- 用VHDL语言完成数字频率计的设计及仿真。频率测量范围：1～10KHz，分成两个频段，即1～999Hz，1KHz～10KHz，用三位数码管显示测量频率，且用LED（发光二极管）来表示所显示单位，我们这里定义亮绿灯表示以Hz为单位，亮红灯表示以KHz为单位。具有自动校验和测量两种功能。具有超量程报警功能。-Digital frequency meter
F_counter
- VHDL硬件描述语言实现自适应频率计的功能，数码管显示，输入主频50M-VHDL hardware descr iption language to achieve adaptive frequency meter function, digital display, input frequency 50M
celiang
- 采用等精度测量方法的频率计的VHDL实现。-Such as precision measurement method using a frequency meter of VHDL.