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vhdl实例-完整微处理器系统模型
- vhdl实例-完整微处理器（cpu）系统模型 -VHDL-integrity microprocessor (CPU) system model
vhdlfinishcpu
- 用vhdl实现简单cpu的功能,能够很好的帮助特别是初学者学习vhdl的功能!-with vhdl cpu to achieve simple function can be very helpful, especially beginners learning vhdl function!
the-design-of-16-bit-cpu
- 用vhdl硬件语言设计的16位cpu，上传的压缩包既包含源代码又包含详细的文档说明。-with vhdl hardware design language of the 16 cpu, Upload compressed contains both the source code also contains a detailed document shows.
vhdl-cpu-16-bit
- VHDL processsor 32 bit ALU SRF BUS DATA ADRESS C16 System On Chip Architecture
mips-cpu
- 单周期的mips处理器设计，用vhdl语言实现各个模块的功能-Single-cycle mips processor design, using vhdl language functions of each module
cpu-and-ram
- 这是一个用VHDL语言写的简单带存储器的CPU设计，不涉及流水线设计，只是简单的利用QUARTUES II里的ram-This is a simple memory write VHDL CPU design, does not involve the assembly line design, simply use the ram in QUARTUES II
CPU_16
- vhdl实现cpu,在实验台上模拟访存，实现简单的四则运算以及跳转-a cpu by vhdl and used on table
cpu
- 实现一个简单的8位cpu，具有基本的运算指令和控制指令，可扩展-Implement a simple 8-bit cpu, have a basic command and control operations instruction, scalable
VHDL-cpu
- 根据计算机组成原理课程所学的知识和本课程所讲的设计思想，设计一个给定指令系统的处理器，包括：VHDL语言的实现；FPFA芯片的编程实现； -Based on the knowledge and the curriculum computer architecture course learn about design thinking, design a given the instruction system' s processor, including: the realizat
vhdl
- vhdl cpu芯片逻辑设计的一部分实现 只有一小部分 大家可以看一下 寄存器 加法器之类的-vhdl cpu chip logic design part of its implementation only a little part everry look and see b=about registers adder and so on
16位CPU设计
- 给定指令系统的处理器设计，VHDL语言，包括代码和仿真波形
cpu
- 用vhdl实现了具有流水的cpu，实现30条基于mips指令的指令集-Achieved with vhdl cpu with water, to achieve 30 mips instruction based instruction set
CPU
- 使用vhdl实现一个简易的cpu包含and or xor add sub mul 指令-Achieved using a simple vhdl cpu contain and or xor add sub mul instruction
CPU
- CPU VHDL based design
eetop.cn_RISC32 VHDL
- 根据vhdl设计的32位CPU具备加减 读写等标准功能(a 32-bit cpu based on VHDL designed with function of fundamental function of subtraction , addition, load and store .)
CPU
- 简单的CPU设计,使用VHDL 和 quartus ii 设计的cpu(a simply cpu design, vhdl quartus ii ,dsg gs h srh rsh rsh srjh srh)
lu
- 16位MIPS指令集，VHDL实现，非常简单，非常粗暴(library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.std_logic_arith.all;)
cpu2
- 基于vhdl语言的cpu模拟，包含仿真，含所有器件(CPU containing simulation based on VHDL language)
CPU
- 针对硬件开发，采用VHDL编写 哈工大计算机设计与实践(Hardware development)
cpu自制入门代码AZPR_RTL
- CPU自制入门代码..............(CPU DIY ............)