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mini_fifo
- 另外一个用VHDL源码编写的FIFO模块程序,可以比较一下和FIFO有什么区别.-Another, prepared by using VHDL source FIFO module procedures, you can compare and What is the difference between FIFO.
00837024
- 一个基于VHDL同步FIFO的设计思路的文章，以及一个编译完整的程序。-VHDL-based synchronous FIFO design ideas article, as well as a compiler procedures.
SYNC_FIFO
- its simple fifo.which is used to first in first out for vhdl source code
fifo_memory
- 用vhdl设计的一个FIFO存储器-Vhdl design with a FIFO memory
fifo1
- 用VHDl写的FIFO 如果刚学VHDL 看看此程序很有用的-By the FIFO write VHDl learn if VHDL just take a look at this program very useful
de2_lcm_ccd_sram
- 这是altera公司DE2的lcm-ccd-sram的代码，希望对大家编写有用-this code based on the altera DE2 board
char_fifo
- character FIFO in VHDL very speed
simpleFIFO
- FIFO的VHDL程序,硬件描述语言源码-FIFO process of VHDL hardware descr iption language source code
DEMO_46_FIFO
- 这是用vhdl语言详细描述一个fifo的全过程，请大家下载-This is the vhdl language with a detailed descr iption of the whole process of fifo, please download
fifo2
- FPGA的异步先入先出程序，VHDL的fifo-VHDL and fifo
vhdlfifo1
- fifo - source code for first in first out(fifo) using VHDL
vhdlfifo
- fifo- source code for fifo using VHDL
FIFO_32B
- This file is the implementation of a 32B FIFO in VHDL and can be implemented as Gate level. It was developed by ISE7.1
fifo_ram
- 同步fifo， 基于FPGA的VHDL编程，已调试。-fifo-ram
sycfifo
- 并行fifo存储器，vhdl语言编写。可设置fifo的宽度和深度。-fifo
try_fifo
- An implementation of fifo in VHDL.
fifo_vhdl
- FIFO using vhdl and aslo configurable
ASPfinalwithoutCLK
- A FIFO PROGRAM USING VHDL, USING ASP PROTOCOL-A FIFO PROGRAM USING VHDL, USING ASP PROTOCOL..