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sram_simul
- Simple simulation example of SRAM in VHDL and Xilinx ISE
T51
- Intel 8051 的民間版 VHDL 原始碼. 在 XILINX ISE 可合成並跑過.-One of the VHDL source code for MCU 8051. This source code was been verified and successful compiles on the XILINX ISE enviroment.
seccount
- 用VHDL语言设计电子数字秒表。包含相关文件及说明，用户可以在Xilinx ISE 环境下运行。-With VHDL language design digital stopwatch. Contains the corresponding code and all documents. Users can Xilinx ISE environment in operation
can_controller
- 基于FPGA的VHDL，can总线控制的设计与实现，在ISE下弄的。-FPGA-based VHDL, can control the design and implementation of the bus, get under the ISE' s.
INTERLEAVER
- 1/3,k=9的卷积码VHDL实现,在xilinx ise上仿真成功。-1/3, k = 9 convolutional code VHDL implementation of the simulation in the xilinx ise success.
ISE0108
- xilinx ise 使用简明手册 vhdl fpga -xilinx ise
decoder
- It is a simple decoder created using vhdl in xilinx ise.It will helpful for beginners to create deocder using this.testbench for simulation is also created.
shuzidianyabiao
- 系统基于EDA技术的智能数字电压表实现,以现场可编程门阵列(FPGA)为设计核心，集成于一片Xilinx公司的SpartanⅡE系列XC2S100E-6PQ208芯片上，在ISE环境下采用超高速硬件描述语言(VHDL)模块化编程,实现了电压的数据采集、转换、处理、显示等功能。本设计的特点在于能够测量的电压范围宽（0~50VDC），主要采用了分压原理,该系统具有集成度高、灵活性强、易于开发和维护等特点。-System based on EDA technology of intelligent d
digital_clock
- 本程序用VHDL语言实现数字时钟的功能，适用于ISE软件-This VHDL program has the function of digital clock and is suited for ISE software
lcd_controller
- 本程序用VHDL语言实现LCD显示“hello，world”的功能，适用于ISE软件-This program with VHDL language LCD display " hello, world" functionality for ISE software
tutorial7
- spartan 3e-counter lcd vhdl code u can use ise 9.2
61i_cic_v3_0_vhdl_ise
- CIC code In VHDL+Xlinx ISE
pinlvji
- 基于FPGA的数字频率计，内含ise工程文件，各模块代码。-VHDL FPGA ISE
jibenmendianlu
- 熟悉使用 ISE 软件进行简单的VHDL 文本方式设计，学习使用USB 电缆或并口下载线 下载逻辑电路到FPGA，并能调试电路使其正常工作。熟悉数字电路集成设计的过程。-Familiar with ISE software to design a simple VHDL text, learning to use a USB cable or parallel port download cable Download logic to the FPGA, and can debug t
bijiaoqidesheji
- 1. 掌握比较器的逻辑功能和工作原理； 2. 进一步熟悉 ISE 的工作环境及操作，练习用VHDL 语言编写比较器程序。-1 master comparator logic functions and working principle 2 more familiar with the ISE work environment and operations, exercises using VHDL language comparator procedures.
duolufuyongqi
- 1. 学习使用 ISE 软件，并用VHDL 语言设计多路复用器； 2. 使用 USB 电缆下载逻辑电路到FPGA，并能根据电路原理调试电路使其正常工作； 3. 掌握数字电路集成设计的过程-1 Learn to use ISE software, and design using VHDL language multiplexer (2) using a USB cable to download logic to the FPGA, and debug circuit accor
bianmaqijimaqi
- 进一步熟悉 ISE 软件的使用，进行简单的VHDL 文本方式设计，学习使用USB 电缆下载逻辑 电路到FPGA，并能调试电路使其正常工作。熟悉数字电路集成设计的过程。-More familiar with the use of ISE software, a simple way to design the VHDL text, learning to use the USB cable to download logic Circuit to the FPGA, and can de
pngpang(2)
- 用vhdl语言使用ise开发工具模拟两人乒乓球游戏，实现状态转换。-Ise vhdl language with development tools using two table tennis simulation game, to achieve the state transition.
AssignmentP6
- 1. For the VHDL model given below (Code List One), compare the FIFOs implementations on CPLD and FPGA. (1) Synthesize and verify (simulate) the VHDL design of the FIFOs (2) For CPLD implementation (fit) of the FIFOs, how many MCs (macrocells)
EDA_examples
- 此为四比特加法器，对于VHDL的初学者来说具有较大用途，运用的是ISE的开发软件，仿真结果正确。-This is four Bite Jia instruments used in, for the larger purpose of VHDL beginners, the use of the ISE development software, simulation results are correct.