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led
- 在ISE环境下VHDL语言编写两个小灯交替亮。-In the ISE environment VHDL language two small light alternating light.
fredivn
- 分频器的VHDL代码和仿真用的代码 基于ISE开发 可以再板子上实现-Divider VHDL code and simulation code on the ISE development board
EDA--light-water-
- 用VHDL设计的流水灯，基于xilinx ise-vhdl light water
seg70_ise7_bak
- 7SEGMENT VHDL CODE-THIS CODE VERY GOD FOR DRIVE 7SEG-IN ISE FUNDATION 11.1
buzz_ise9migration
- TISH PROGRAM VHDL CODE -THHIS CODE GOD FOR DRIVE BUZER IN ISE
keypad4x4_4
- THIDS CODE VERY GOD FOR DRIVE KEYPAD4X4 IN VHDL COD IN ISE
vga_ise7_bak
- THIDS CODE VERY GOD FOR DRIVE VGA IN VHDL COD IN ISE
VHDL_60-system_counter
- 用VHDL语言编写的简易60进制的可调节计数器，用于Xilinx ISE软件-A 60-digit system settable countr using VHDL, programming using Xilinx ISE
uart
- uart串口通讯，波特率任意可调，采用vhdl语言编写，ise和quartus均可使用-uart serial communication baud rate of any adjustable
Assignment-3
- Assignment 3 Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption styles, i.e., behavioral, dataflow and structural descr iptions. (1) Synthesize and (2) simulate these models respectively in the environment of Xilinx I
assigment3
- Construct VHDL models for 74-139 dual 2-to-4-line decoders using three descr iption styles, i.e., behavioral, dataflow and structural descr iptions. Synthesize and simulate these models respectively in the environment of Xilinx ISE with the Mod
adder_s
- 八位并行加法器，同时进位，利用VHDL语言，在ISE环境中建立工程-Eight parallel adder
CPU
- 在THINPAD平台上的50M时钟5级流水支持THCOMIPS指令集的CPU，并附带8核扩展，内有详细实验报告。全部用VHDL编写，并附有样例验证程序，开发环境为ISE 14.1。-Water support THCOMIPS instruction set CPU 50M clock the THINPAD platform 5 and comes with an 8-core extension, within a detailed test report. All written usin
myproject
- 开发环境ISE，使用VHDL语言实现了任意整数分配的分频器，又有一个信号可以控制左转右转的流水等。-Development environment ISE using VHDL language to achieve arbitrary integer assigned crossover, there is another signal control Zuozhuanyouzhuan running water, etc..
delight22
- 速度监控器，按键切换速度，数码管显示，若快到临界速度则闪烁。ISE，Xilinx，VHDL-The speed monitor, the key switching speed, digital display flashes if approaching the critical speed. ISE, Xilinx, VHDL
RGLight
- 本程序是基于VHDL的模拟交通灯程序，程序开发环境为ISE-This program is based on the the VHDL simulation traffic lights program, the program development environment for ISE
Divider
- 除法的fpga实现 开发环境ise 语言vhdl-divider ise vhdl fpga
comprator_str_miley
- vhdl comprator and miley version that can simulate ans synthesis in all aoftwares like modelsim and quartus and ise
ledvhd
- ISE与VHDL入门程序，使用DCM分频实现LED的控制。-ISE and VHDL entry procedures with DCM divide LED control.
I2C
- I2C控制器的VHDL实现，软件环境为ISE-I2C controller VHDL implementation