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- 北京邮电大学VHDL课程作业，基于xilince ISE试验箱开发的，可以做简单的半加器加法-Beijing University of Posts and VHDL course work, based xilince ISE chamber developed, can do simple addition of half-adder
rs(63-45)
- 用VHDL实现的RS（63,45）编码器，已经用ISE和questasim编译仿真通过。对45个信息位进行编码。-VHDL implementation of the RS (63,45) encoder has been compiled with the ISE and questasim through simulation. Of 45 information bits are encoded.
1540000000000031952_taxi
- 一个基于FPGA使用VHDL语言编译的出租车计价器，在Xilinx ISE环境下编译-An FPGA using VHDL language compiler taxi meter, compiled under Xilinx ISE environment
TouchPad
- 一个触摸屏打地鼠小游戏 ，利用VHDL实现，在Xilinx ISE环境下编译。-A touch-screen play hamster game, using the VHDL implementation, compiled under Xilinx ISE environment.
Arbitrary-_odd_-frequency_VHDL_code
- 任意奇数分频的VHDL代码和testbench测试VHDL代码，经过ISE的ISim仿真工具测试，模块功能准确有效，特此分享！-Arbitrary odd frequency of VHDL code and test VHDL testbench code, after the ISE ISim simulation tool to test module functions accurately and effectively, would like to share!
CX40_Code
- 某公司的驱动TFT LCD的测试代码,使用VHDL，ISE环境-A company' s drive TFT LCD test code
decoder
- bch decoder 3072 3240 vhdl source code with ise software
BH_Shi_jizhi_Out
- FPGA开发 VHDL语言 常用进制转换 基于Xilinx开发平台 ISE软件-VHDL language commonly used FPGA development hexadecimal conversion based on Xilinx ISE software development platform
qpsk_PRJ
- 利用FPGA实现qpsk，ISE工程文件及代码-realize the QPSK by FPGA using VHDL
Projects
- this is sub and adder in vhdl &writed in ISE
WEIBOLU
- 基于ISE开发板的微波炉代码，具体的可以打开看,其中有原理图和VHDL两种-the code based on ISE
code_lock_vhdl
- 在ISE环境下用vhdl写的一个密码锁程序。下载到xilinx 公司的 spartan6 的板子上验证过的，也有仿真代码。主要就是几个状态之间的转换，用了一个moore状态机。-In the ISE environment using vhdl to write a lock program. Downloaded to the board spartan6 xilinx' s proven, there are simulation code. Mainly the conversion
FDIV10E
- ISE下用vhdl语言实现10分频及测试-ISE achieve 10 points lower frequency and test vhdl language
shuzizhong
- 在ise平台上用VHDL语言实现数字钟，具有计时和重置时间功能、整点报时功能、闹钟功能，每个功能都使用元件例化的方法，通过顶层文件将每一个模块联系在一起。-On ise platform using VHDL digital clock with timer and reset the time function, the whole point timekeeping function, alarm clock function, each function using the compone
vhdlCyc3.0
- 完整可用的VHDL编写健身自行车控制系统的复杂状态机系统，使用ISE编写，在spartan6上实测通过-Complete exercise bikes available in VHDL state machine control system complexity system using ISE written by the spartan6 Found
admod15
- 在Xllinx ISE平台上，利用VHDL语言实现模15加法器的运算-The programme realize the adder of mod 15 through VHDL on Xllinx ISE.
SyncounterFinal
- 在Xillinx ISE 平台上利用VHDL语言实现同步计数器，利用状态机实现，导入FPGA版点亮7段数码管并实现加、减计数功能。-The programme realizes a counter based on synchronous state machines, and it can be download to a FPGA chip.
dec38
- 在XIllinx ISE平台上利用VHDL基于结构化语句实现了38译码器。-The programme realizes an 3-8 decoder based on component descr iption through VHDL on Xillinx ISE.
3-example_dt_2
- Vhdl编写的数码管驱动，动态7段码，FPGA实验板，Xilinx ISE实验环境-Vhdl write digital tube drive, dynamic 7-segment code, FPGA experimental board, Xilinx ISE experimental environment
encoder
- Encoder is written in VHDL. This is simulated using ISIM and synthesized with ISE