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vhdlcode
- Vhdl code for d flip flop
lab5_
- 这是在vhdl开发环境下模拟D-FLI FLOP,T-FLIP FLOP 和 JK-flip flop。其中包含testbench 源码。-This is the vhdl development environment simulation D-FLI FLOP, T-FLIP FLOP and JK-flip flop. Which contains the testbench source.
D_FF_ok_D
- Learning FPGA students can see, this code USES VHDL language to write D flip-flop, not only can learn QUARTUS software, also can better enhance the digital circuit design.
1_ff_d_vhd
- flip-flop d implementation in vhdl
lcd12864
- 能用液晶12864显示A/D采样电压的关于VHDL语言编写的程序-12864 LCD can display A/D sampling the voltage on the VHDL language program
SHIXUN
- D触发器，运用VHDL语言编写，属于课程设计环节。-D flip-flop, using VHDL language, belonging to curriculum design aspects.
VHDL_trigger
- 本实验是VHDL的触发器实现，将基本RS触发器，同步RS触发器，集成J-K触发器，D触发器同时集成在一个CPLD芯片中模拟其功能，并研究其相互转化的方法。-This experiment is the trigger of VHDL realize, will be basically RS flip-flop, synchronous RS flip-flop, the integrated JK flip-flop, D flip-flops simultaneously integrate
lablab2
- 实现四位串入串出的移位寄存器，其实就是四个D触发器相连的VHDL代码，ISE可以运行-Achieve four string into the string out of the shift register, in fact, four D flip-flop connected to the VHDL code, ISE can run
danweitaichufaqi
- 用VHDL实现了单稳态触发器的计数器功能，配合单稳态触发器中的D触发器可以实现单稳态触发器功能。-Using VHDL realize counter function of monostable trigger, D trigger monostable trigger monostable trigger function can be achieved.
johncounter_D
- VHDL CODE FOR JOHNSON COUNTER USING D FLIPFLOP
Dlatch3
- 基于VHDL的触发器设计。 由一个电平触发的D触发器构成的上下边沿触发器。-Trigger-based VHDL design. Consists of a level-triggered D flip-flops up and down the edge of the trigger.
635355963606373750
- 本文介绍了应用FPGA实现对高速A/D转换芯片的控制电路，介绍了这一控制的设计思想，并提出了通过双口RAM实现FPGA与慢速度的单片机进行双机数据通信处理的解决方案。- Data acquisition is an item of indispensable technology which is essential to the industrial control system. As the increasing need for speed performance of the da
ads1675
- 通过FPGA读取24Bit的A/D芯片ADS1675的VHDL代码程序-VHDL Code for 24 bits ad1675
DAC8812
- 控制16Bit的D/A芯片DAC8812的FPGA的VHDL代码-FPGA Code control DAC8812
DFF
- D触发器VHDL全代码，实验代码，已调试通过。D触发器VHDL全代码-D flip-flop full VHDL code, test code, debugging
d_flip_en
- VHDL code for generating D-flip flop
Dchufaqi
- 用VHDL语言编程来实现D触发器以及它的各个功能。-VHDL language programming to achieve D flip-flop and its various functions.
8weijiafaqi
- 8位加法器的verilog实现。VHDL，单片机开发程序，数字逻辑与处理器基础实验，你懂d。-8 adder verilog implementation. VHDL, MCU development program, the digital logic and processor basic experiment, you know d.
erxuanyiduoluxuanzeqi_no_maoxian
- 二选一多路选择器的verilog实现。VHDL，单片机开发程序，数字逻辑与处理器基础实验，你懂d。-Choose one multiplexer selector verilog implementation. VHDL, MCU development program, the digital logic and processor basic experiment, you know d.
qiduanyimaqi_verilog
- 七段译码器的verilog实现。VHDL，单片机开发程序，数字逻辑与处理器基础实验，你懂d。-Seven segment decoder verilog implementation. VHDL, MCU development program, the digital logic and processor basic experiment, you know d.