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xuliejiance
- 《序列检测器》绝对好用的EDA实验程序,已经通过测试！VHDL语言编写-"Sequence Detector" absolutely good for EDA experimental procedure, he has passed the test! VHDL language
EDA
- EDA实验序列信号检测器和模可变计数器，工程文件和VHDL文件-EDA test sequence signal detector and variable-counter model, project files and VHDL files
Sequencedetector
- 用VHDL语言实现的序列检测器 （以1010111为例）-Sequence detector (for example 1010111)
VHDL_design_of_sequence_detector
- VHDL中序列检测器的设计的实验报告，包括源代码-VHDL in the design of sequence detector test reports, including the source code
sequence_detector
- 用VHDL语言实现一个序列检测器，检测到规定的序列时输出一高电平-VHDL language used to implement a sequence detector, to detect the sequence provided a high level when the output of
ram
- vhdl program for random access memory and sequence detector
Seqcheck
- 用VHDL编写的序列检测器，是完整工程。-Written by VHDL sequence detector is a complete project.
Program
- 用VHDL状态机设计一个8位序列信号检测器。-Design a state machine in VHDL 8-bit serial signal detector.
VHDL_design
- 以VHDL设计一有限状态机构成的序列检测器。序列检测器是用来检测一组或多组序列信号的电路，要求当检测器连续收到一组串行码（如1110010）后，输出为1，否则输出为0。-With VHDL Design into a finite state machine sequence detector. Sequence detector is used to detect the signal sequence of one or more groups of circuits, require th
State_Machine
- 状态机的VHDL实现，在quartus-ii7.2上测试通过，文件包括米利状态机，摩尔状态机，ADC0809的状态机实现，序列检测器和定时去毛刺的状态机实现。-State machine code in VHDL,successfully tested in quartus-ii7.2,the file contains mealy state machine,moore state machine,ADC 0809 and sequence detector achieved in state
2moreqamcodes
- the code is about ML detector of mimo technology ,,,,we need of vhdl code for all detectors
s101
- 用VHDL语言，设计一个“101”序列检测器，双过程描述编写-VHDL language, to design a dual procedure describes the preparation of "101" sequence detector.
EDA1
- 用VHDL编程实现序列信号发生器与检测器设计和数字钟设计-VHDL programming sequence signal generator and detector design and the design of the digital clock
p_dect--5
- 奇偶检测器 vhdl实现 quartus编译通过-Parity detector the vhdl realize quartus compiled by
check
- 这是一个检测器，功能是可以检测输入信号里面“1111”序列的vhdl程序。-This is a detector, the function is the sequence of " 1111" of the input signal which can be detected vhdl procedures.
aa
- 这个程序就是序列检测器的vhdl实现，真麻烦啊-This program is the sequence detector vhdl achieve real trouble
EDAexp4
- FPGA环境下，用VHDL语言实现序列脉冲器和检测器。-FPGA environment, the use of the VHDL sequence of pulses and detector.
serial1
- 基于VHDL语言实现的序列检测器，包含按键防抖动功能的实现。-Sequence detector based on the VHDL language, containing the button shake function to achieve.
even_detector_file_based_stimuli
- even detector based stmiulde and vhdl code
11
- VHDL序列检测器，使用了EDA课程里面用到的状态机.-VHDL sequence detector, the use of EDA curriculum used inside the state machine.