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SCHK
- ise13.2环境下VHDL编写的8位序列检测器+仿真波形-ise13.2 environment in VHDL 8 sequence detector+ simulation waveforms
basic_1
- vhdl 语言实现序列检测器 -vhdl language sequence detector vhdl language sequence detector
seq_detector
- 3比特的任意二值序列检测器(例如101、110、001等)。从任意序列中检测出三比特的序列。包含VHDL源码以及testbench测试源码程序。-The 3-bit binary sequence of any detector (e.g., 101,110,001, etc.). A three-bit sequence is detected from an arbitrary sequence. Includes VHDL source code and testbench test so
checkfor1101
- 1101序列检测器,VHDL编写,外部输入任意序列,一旦检测到1101就亮led提示。-1101 sequence detector, VHDL prepared, external input arbitrary sequence, once detected 1101 bright LED tips.
6_bit_prime_detector
- 6 bit prime detector vhdl
xuliejiancejisuanqikongzhiqi
- VHDL序列检测器,计算器,控制器编码以及实现方法。-VHDL sequential detector, calculator, controller and its implementation method.
code
- 本源码是基于VHDL语言环境下的基础实验源码,共分七个部分。分别是:序列检测器、数字密码锁、四位有符号数除法、同步FIFO、DPLL的设计以及Cordic 算法实现。对于VHDL的初学者具有极大的参考价值。-The source is based on experimental basis source VHDL language environment, it is divided into seven sections. They are: the sequence detector, di
examples
- Code on Debouncer, ripple carry adder, Sequence detector, huffmann encoder and some more examples in VHDL
Lab3
- Sequential binary Message detector Objectives 1. Working with finite state machines. 2. Defining user types in VHDL
kebenchengxu
- VHDL代码,一些课本的小程序。包含3线-8线译码器,4选1选择器,6层电梯,8线-3线编码器,8线-3线优先编码器,8选1,BCD-7段显示译码器真值表,半加器,摩尔状态机,数字频率计,数字时钟,同步计数器,序列检测器的设计,序列信号发生器,一般状态机等等。(The small program of some textbooks. Includes 3 -8 decoder, 4 1 selector, 6 elevator, line 8 Line 8 line -3 encoder, -3