搜索资源列表
pseudorandom
- 伪随机m序列产生的VHDL语言程序- program in VHDL language for generating pseudo-random m sequence
3
- 基于VHDL语言的3级序列的产生,可以循环产生周期为7的m序列
mcode
- 用VHDL语言生成m序列,进行扩频。m序列是10级的。-m sequence
m_vhdl
- 伪随机序列发生器的vhdl算法 设计一个伪随机序列发生器,采用的生成多项式为1+X^3+X^7。要求具有一个RESET端和两个控制端来调整寄存器初值(程序中设定好四种非零初值可选)-m sequence vhdl
m
- vhdl,序列信号发生器,发出11101010,可更改为任意序列-vhdl, sequence signal generator, issued 11.10101 million, you can change an arbitrary sequence of
VHDlsheji
- 本文介绍了一种使用VHDL 设计多波形m 序列 发生器的原理与实现方法。-This paper presents a VHDL design using multi-waveform m sequence generator principle and realization method.
mvhdl
- 此文件中包含m序列发生器详细的vhdl源码,欢迎各位下载-it is a file of m porducor based on vhdl
communications_1
- 用vhdl代码描述的通信系统仿真程序。包括信源(20位m序列),crc编码(采用串行算法),加噪(用22位m序列产生稀疏的1,然后和编码后的数据异或)。-Vhdl code with the simulation program described in the communication system. Including the source (20 m sequence), crc code (using the serial algorithm), noise (with 22 m se
communications_2
- 用vhdl代码描述的通信系统仿真程序。包括信源(20位m序列),crc编码(采用串行算法),加噪(用22位m序列产生稀疏的1,然后和编码后的数据异或),crc解码,数据串行输出。 -Vhdl code with the simulation program described in the communication system. Including the source (20 m sequence), crc code (using the serial algorithm), no
2DPSK-linan
- 全数字2DPSK调制解调系统,为VHDL语言。包括512分频器,M序列发生器等。整个过程完成2DPSK的调制与解调。-The full the digital 2DPSK modem system for the VHDL language. Including the 512 divider, the M-sequence generator. The whole process is completed 2DPSK modulation and demodulation.
mxule
- 实现12阶m序列的VHDL,在BASYS2板上测试,平台为Xilinux12,经测试可用,且可修改函数式输出不同阶的m序列-12 order m-sequence of VHDL in the BASYS2 board test platform for Xilinux12 has been tested and available, and can modify the function output sequence of order m
m_seq
- 用VHDL代码编写的m序列发生器,包含发生器和测试用例模块-M sequence generator written in VHDL code, including the generator and the test case module
src_gen
- 使用VHDL语言产生m序列,用于通信系统的随机信源-To generate m sequence with HHDL,whcih is used as random source in communication system
jiarao4
- 加扰与解扰,VHDL实现。初始寄存器值为1产生的m序列。-Scrambling and descrambling, VHDL. Initial register value 1 of the m-sequences generated.
lab_2
- VHDL 实现M序列发生器 附带测试与限定文件-M-sequence generator VHDL incidental test with limited file
Mxulie
- VHDL语言编写,利用FPGA实现的M序列发生器-VHDL language, FPGA realization of the M sequence generator
mvhdl
- m序列发生器vhdl语言quartus2-m sequence generator vhdl language quartus2
device
- 这个文件夹是利用VHDL语言,可以实现任意整数频率(0-255Hz)的5/7/9阶M序列生成。-This folder is the use of VHDL language, can realize arbitrary integer frequency (0-255 hz) 5/7/9 order M sequence generation.
M_generation
- 伪随机序列发生器,即M序列发生器,VHDL语言完成,已仿真通过。-Pseudo-random sequence generator, VHDL language completed, through simulation.
VHDLquartusmodelsim
- 内容有VHDL语法总结及相应的实例应用,每个程序我都亲自试过,特别适合初学VHDL的同学们。常用的程序有 设计一个M序列发生器,M序列为“11110101”、 设计一个彩灯控制器,彩灯共有16个,每次顺序点亮相邻的四个彩灯,如此循环执行,循环的方向可以控制。设计一个跑马灯控制器。一共有8个彩灯,编号为LED0~LED7,点亮方式为:先从左往右顺序点亮,然后从右往左,如此循环往复等等。这些都是我在考试前熬夜总结的,很有用。如果配合开发板用的话,那就更好了- VHDL syntax summary