搜索资源列表
flash
- fpga的FLASH读写VERILOG代码。希望对大家有用-the verilog code of fpga read/write flash
IEEEStd1364_2001
- verilog 1364——2001 语言标准-Verilog Hardware Descr iption Language standard
5
- simple code based on verilog shifter , cla ,clg , ALU ,PC, decoder , tb_top
verilog-program
- 国外经典verilog程序集锦，含有从最简单的定时器创建到复杂逻辑的实现。-Classic Collection verilog program abroad, with the timer created from the most simple to complex logic.
iir_par_code
- IIR code. IEEE STD 1364-1995 Verilog file: iir_par.v.
64point_FFT
- 64-point Pipeline FFT，包含Verilog语言编写的64点FFT运算rtl级程序以及测试程序，此外，还包含设计文档。-64-point Pipeline FFT, Verilog language includes a 64 point FFT computation rtl-level procedures and testing procedures, in addition, includes the design documents.
cache
- 缓存器 cache verilog 欢迎下载偶-cache verilog
counter
- 用Verilog HDL语言实现FPGA的频率等精度测量。（已经过验证）-Using Verilog HDL language, such as FPGA frequency measurement accuracy. (Has already been verified)
LIP1601CORE_des_3des
- DES & 3DES VHDL & Verilog code
medianfilter
- 图像滤波中的中值滤波，有效滤除椒盐噪声，使用verilog语言编写-Image filtering in the median filter, effectively filter out salt and pepper noise, using verilog language
lcd1602
- verilog编写的LCD1602控制源代码，能够显示一串字符。-verilog source code written LCD1602 control, can display a string of characters.
psk
- 应用verilog语言编写实现二元相移键控调制过程-Application verilog language to achieve binary phase shift keying modulation
Verilog
- 基于Verilog HDL的通信系统设计一书的源代码，大家可以下载，参考一下-Verilog HDL-based communication system design of the book source code, you can download, refer to
Verilog_module
- Verilog编写基于FPGA的鉴相器模块-Write Verilog FPGA-based phase detector module
multiplexer
- 几种常用乘法器的Verilog、VHDL代码-Several common multiplier Verilog, VHDL code
UART_VHDL_Verilog_Lattice
- 本压缩包中含有串口程序的VHDL,Verilog，Lattice三种版本的代码，均已实现。在压缩包中，含有非常详细的串口的实现规格。各种版本的代码中，含有完成的源文件，测试文件，模拟文件。-This compressed package contains serial process VHDL, Verilog, Lattice three versions of the code, have been achieved. In the compressed package, contains
usb20
- 通用接口usb2.0的verilog开发代码-Common interface usb2.0 development of the verilog code
eeprom
- VERILOG实际例程，非常适合初学者学习-VERILOG the actual routine, ideal for beginners to learn
Writing_Testbenches_using_System_Verilog
- Testbench creation and development methodology with System Verilog. By Janick Bergeron.
i2c
- 标准I2c读写时序，verilog Hdl-Standard I2c read and write timing, verilog Hdl