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一个并行转串行的verilog源程序,可以讲12位并行数据转换为一个串行数据,A parallel to serial verilog source code you can transfer your parallel data to serial data.you have 12bits parallel data then you will have a serial data
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LDPC的Verilog程序源代码，包括仿真数据等。文件很大，请慢慢下载,LDPC of Verilog source code, including the simulation data. Large file, please download slowly
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8b10b转换编码、解码verilog源代码,8b10b transcoding, decoding verilog source code
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Verilog中经典的自动售货机的源代码，包含测试程序,Vending machine in the classic Verilog source code, including test procedures
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arm 的ssp—spi verilog源代码,arm of the ssp-spi verilog source code
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RGB转为YCBCR格式的verilog源代码，对熟悉verilog编程有帮助,RGB to YCbCr format Verilog source code, to people familiar with Verilog programming help
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Verilog编写的UART程序源代码。测试成功。支持字符串发送,UART prepared Verilog source code. Successful test. Support string sent
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Cordic算法实现DDS的Verilog 源码,14位精度，非常实用的。-DDS algorithm Cordic the Verilog source code, 14-bit accuracy, very practical.
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verilog编写的读写fifo的源码，包括sram的读写控制-verilog source code written to read and write fifo, including the sram to read and write control
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TFT液晶屏驱动模块Verilog源码。实现方法：XC95288+K6R4008，K6R4008主要用作帧缓冲区，此模块仅支持256色-TFT LCD driver module Verilog source code. Realization: XC95288+ K6R4008, K6R4008 mainly used as a frame buffer, this module only supports 256 colors
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完整的用VERILOG语言开发的USB2.0 IP核源代码，包括文档、仿真文件-VERILOG language with a complete development of USB2.0 IP core source code, including files, simulation files
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基于FPGA的嵌入式机器人视觉识别系统模块源代码，也包括了所有硬件设计资料，是VERILOG格式-Embedded FPGA-based Robot Vision Recognition System module source code, including all hardware design information
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fir滤波器-verilog，基于verilog的fir滤波器源码-fir filter-verilog, the fir filter based on the Verilog source code
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采用用verilog语言编写的全数字锁相环的源代码。-Verilog language used by all-digital phase-locked loop' s source code.
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vga 控制器的verilog 源码 ，fpga上可实现图片的显示-vga controller Verilog source code, fpga achievable picture display
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用verilog编写的分辨率提高的源代码 采用双线性插值-Written resolution with the verilog source code to improve the use of bilinear interpolation
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fpga控制ti的多通道高精度ad芯片ads8364的verilog源码-fpga multi-channel high-precision control ti ad-chip ads8364 the verilog source code
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基于FPGA的AES算法实现的VERILOG源代码，对于信息安全专业研究AES算法的硬件实现很有用-FPGA-based AES algorithm implementation VERILOG source code, for the information security professional research of the hardware implementation of AES algorithm is useful
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伪随机序列产生器－线性反馈移位寄存器，Verilog HDL 原代码。-Pseudo-random sequence generator- linear feedback shift register, Verilog HDL source code.
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这是一个求最大公约数的verilog源码-this is a verilog source code which can count the greatest common divider .
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